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All Technical Committee Conferences (Searched in: All Years)
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| Search Results: Conference Papers |
| Conference Papers (Available on Advance Programs) (Sort by: Date Descending) |
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| Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
| MRIS, ITE-MMS |
2018-07-06
16:35 |
Tokyo |
Waseda Univ. (Tokyo) |
Ultra-high-efficient Writing in Voltage-Control Spintronics Memory(VoCSM)
Altansargai Buyandalai, Mariko Shimizu, Hiroaki Yoda, Tomoaki Inokuchi, Yuichi Ohsawa, Naoharu Shimomura, Satoshi Shirotori, Hideyurki Sugiyama, Yushi Kato, Mizue Ishikawa, Katsuhiko Koi, Soichi Oikawa, Kazutaka Ikegami, Satoshi Takaya, Shinobu Fujita, Atsushi Kurobe (Toshiba Corporation) |
[more] |
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| MRIS, ITE-MMS |
2017-07-07
16:10 |
Tokyo |
Tokyo Tech (Tokyo) |
Voltage-Control Spintronics Memory (VoCSM)
Altansargai Buyandalai, Hiroaki Yoda, Mariko Shimizu, Tomoaki Inokuchi, Yuichi Ohsawa, Naoharu Shimomura, Satoshi Shirotori, Hideyurki Sugiyama, Yushi Kato, Yuuzo Kamiguchi, Katsuhiko Koi, Soichi Oikawa, Mizue Ishikawa, Yoshiaki Saito, Atsushi Kurobe (Toshiba Corp.)  MR2017-16 |
We propose a new spintronics-based memory VoCSM (Voltage-control Spintronics Memory) employing the voltage-control-magne... [more] |
MR2017-16
pp.37-40 |
| SDM |
2016-01-28
15:20 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. (Tokyo) |
[Invited Talk]
MTJ based "Normally-off processors" with thermal stability factor engineered perpendicular MTJ, L2 cache based on 2T-2MTJ cell, L3 and Last Level Cache based on 1T-1MTJ cell and novel error handling scheme
Kazutaka Ikegami, Hiroki Noguchi, Satoshi Takaya, Chikayoshi Kamata, Minoru Amano, Keiko Abe, Keiichi Kushida, Eiji Kitagawa, Takao Ochiai, Naoharu Shimomura, Daisuke Saida, Atsushi Kawasumi, Hiroyuki Hara, Junichi Ito, Shinobu Fujita (Toshiba) SDM2015-126 |
MTJ-based cache memory is expected to reduce processor power significantly. However, write energy increases rapidly for ... [more] |
SDM2015-126
pp.27-30 |
| ICD |
2015-04-17
12:40 |
Nagano |
(Nagano) |
[Invited Talk]
Low-power Embedded Perpendicular STT-MRAM Design for Cache Memory
Hiroki Noguchi, Kazutaka Ikegami, Keiichi Kushida, Keiko Abe, Shogo Itai, Satoshi Takaya, Chika Tanaka, Chikayoshi Kamata, Minoru Amano, Eiji Kitagawa, Naoharu Shimomura, Atsushi Kawasumi, Hiroyuki Hara, Junichi Ito, Shinobu Fujita (Toshiba) ICD2015-10 |
[more] |
ICD2015-10
pp.45-50 |
| SDM |
2015-01-27
14:50 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. (Tokyo) |
[Invited Talk]
Low power and high memory density STT-MRAM for embedded cache memory using advanced perpendicular MTJ integrations and asymmetric compensation techniques
Kazutaka Ikegami, Hiroki Noguchi, Chikayoshi Kamata, Minoru Amano, Keiko Abe, Keiichi Kushida, Takao Ochiai, Naoharu Shimomura, Shogo Itai, Daisuke Saida, Chika Tanaka, Atsushi Kawasumi, Hiroyuki Hara, Junichi Ito, Shinobu Fujita (Toshiba) SDM2014-142 |
Due to difficulty to increase clock frequency, recent processors increase cache memory to improve performance. However, ... [more] |
SDM2014-142
pp.29-32 |
| ICD, CPSY |
2014-12-02
10:20 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. (Tokyo) |
[Invited Talk]
Normally-Off Computing with Perpendicular STT-MRAM
Hiroki Noguchi, Kazutaka Ikegami, Naoharu Shimomura, Tetsufumi Tanamoto, Junichi Ito, Shinobu Fujita (Toshiba) ICD2014-102 CPSY2014-114 |
[more] |
ICD2014-102 CPSY2014-114
pp.107-112 |
| MRIS, ITE-MMS |
2014-10-03
09:30 |
Niigata |
Kashiwazaki energy hall, Niigata (Niigata) |
*
Daisuke Saida, Naoharu Shimomura, Eiji Kitagawa, Chikayoshi Kamata, Megumi Yakabe, Yuuichi Osawa, Shinobu Fujita, Junichi Ito (Toshiba) MR2014-18 |
(To be available after the conference date) [more] |
MR2014-18
pp.27-31 |
| SDM |
2014-01-29
13:05 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. (Tokyo) |
[Invited Talk]
Future Prospects of MRAM Technologies
Shinji Yuasa, Akio Fukushima, Kay Yakushiji, Takayuki Nozaki, Makoto Konoto, Hiroki Maehara, Hitoshi Kubota, Tomohiro Taniguchi, Hiroko Arai, Hiroshi Imamura, Koji Ando (AIST), Yoichi Shiota, Frederic Bonnel, Yoshishige Suzuki (Osaka Univ.), Naoharu Shimomura (Toshiba) SDM2013-140 |
[more] |
SDM2013-140
pp.23-28 |
| SDM |
2014-01-29
13:30 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. (Tokyo) |
[Invited Talk]
Variable Nonvolatile Memory Arrays for Adaptive Computing Systems
Hiroki Noguchi, Susumu Takeda, Kumiko Nomura, Keiko Abe, Kazutaka Ikegami, Eiji Kitagawa, Naoharu Shimomura, Junichi Ito, Shinobu Fujita (Toshiba) SDM2013-141 |
[more] |
SDM2013-141
p.29 |
| MRIS, ITE-MMS |
2013-07-12
16:35 |
Tokyo |
Chuo Univ. (Tokyo) |
Progress on STT MTJ writing Technology and the Effect on Normally-off Computing Systems
Junichi Ito, Hiroaki Yoda, Shinobu Fujita, Naoharu Shimomura, Eiji Kitagawa, Keiko Abe, Kumiko Nomura, Hiroki Noguchi (Toshiba) MR2013-13 |
We propose a new processor using STT-MRAMs as cache memories. It enables “Normally-off computing”, where the processor i... [more] |
MR2013-13
pp.37-41 |
| ICD |
2013-04-11
15:30 |
Ibaraki |
Advanced Industrial Science and Technology (AIST) (Ibaraki) |
[Invited Talk]
Novel Vertical Magnetization STT-MRAM Technologies for Reducing Power of High Performance Mobile Processors
Shinobu Fujita, Keiko Abe, Hiroki Noguchi, Kumiko Nomura, Eiji Kitagawa, Naoharu Shimomura, Junichi Ito, Hiroaki Yoda (Toshiba) ICD2013-8 |
[more] |
ICD2013-8
pp.39-40 |
| ICD |
2010-04-22
13:30 |
Kanagawa |
Shonan Institute of Tech. (Kanagawa) |
[Invited Talk]
A 64Mbit MRAM with Clamped-Reference and Adequate-Reference Schemes
Kenji Tsuchida, Tsuneo Inaba, Katsuyuki Fujita, Yoshihiro Ueda, Takafumi Shimizu, Yoshiaki Asao, Takeshi Kajiyama, Masayoshi Iwayama, Sumio Ikegawa, Tatsuya Kishi, Tadashi Kai, Minoru Amano, Naoharu Shimomura, Hiroaki Yoda, Yohji Watanabe (TOSHIBA) ICD2010-7 |
A 64Mb spin-transfer-torque MRAM in 65nm CMOS is developed. 47mm2 die uses 0.3584um2 cell with the perpendicular-TMR dev... [more] |
ICD2010-7
pp.35-40 |
| ICD |
2008-04-18
14:45 |
Tokyo |
(Tokyo) |
Experimental proof of spin transfer switching in MRAM cell using TbCoFe/CoFeB layers with perpendicular magnetic anisotropy
Masahiko Nakayama, Tadashi Kai, Naoharu Shimomura, Minoru Amano, Eiji Kitagawa, Toshihiko Nagase, Masatoshi Yoshikawa, Tatsuya Kishi, Sumio Ikegawa, Hiroaki Yoda (R&D Center, Toshiba Corp.) ICD2008-14 |
(To be available after the conference date) [more] |
ICD2008-14
pp.75-78 |
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