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All Technical Committee Conferences (Searched in: All Years)
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Search Results: Conference Papers |
Conference Papers (Available on Advance Programs) (Sort by: Date Descending) |
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Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
SDM |
2011-10-21 15:50 |
Miyagi |
Tohoku Univ. (Niche) |
Performance Evaluation of 3D FPGA using Through Silicon Via Naoto Miyamoto (Tohoku Univ.), Yohei Matsumoto (Tokyo Univ. of Marine Science and Technology), Hanpei Koike (AIST), Tadayuki Matsumura, Kenichi Osada, Yahoko Nakagawa (ASET), Tadahiro Ohmi (Tohoku Univ.) SDM2011-113 |
3D LSI fabrication is a promising technology as a representative of “More Than Moore” stream. 3D FPGA is one of the kill... [more] |
SDM2011-113 pp.91-96 |
ICD, IPSJ-ARC |
2011-01-20 11:00 |
Kanagawa |
Keio University (Hiyoshi Campus) |
Performance Evaluation of 3D FPGA with Homogeneous Tileable Structure Naoto Miyamoto (Tohoku Univ.), Hanpei Koike (AIST), Yohei Matsumoto (Kaiyo Univ.), Tadayuki Matsumura, Kenichi Osada, Yahoko Nakagawa, Keisuke Toyama (ASET), Tadahiro Ohmi (Tohoku Univ.) |
3D LSI fabrication is a promising technology as a representative of "More Than Moore" stream. 3D FPGA is one of the kill... [more] |
ICD2010-130 pp.13-18 |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2009-12-02 11:00 |
Kochi |
Kochi City Culture-Plaza |
A WiMAX Turbo Decoder with Tailbiting BIP Architecture Hiroaki Arai, Naoto Miyamoto, Koji Kotani (Tohoku Univ.), Hisanori Fujisawa (Fujitsu Laboratories Ltd.), Takashi Ito (Tohoku Univ.) CPM2009-136 ICD2009-65 |
In this paper, a tailbiting block-interleaved pipelining (BIP) architecture is proposed for high-throughput and energy e... [more] |
CPM2009-136 ICD2009-65 pp.13-18 |
SDM |
2009-10-29 17:15 |
Miyagi |
Tohoku University |
Statistical Analysis of Random Telegraph Signal Using a Large-Scale Array TEG with a Long Time Measurement Takafumi Fujisawa, Kenichi Abe, Syunichi Watabe, Naoto Miyamoto, Akinobu Teramoto, Shigetoshi Sugawa, Tadahiro Ohmi (Tohoku Univ.) SDM2009-123 |
For the development of miniaturizing MOSFET and manufacturing low noise devices, it is important to suppress RTS noise. ... [more] |
SDM2009-123 pp.31-36 |
VLD, CPSY, RECONF, IPSJ-SLDM |
2009-01-30 14:10 |
Kanagawa |
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Delay Evaluation of 90nm CMOS Multi-Context FPGA for Large-Scale Circuit Emulation Naoto Miyamoto, Tadahiro Ohmi (Tohoku Univ.) VLD2008-119 CPSY2008-81 RECONF2008-83 |
For large-scale circuit emulation with using a multi-context FPGA (MC-FPGA), a circuit is divided into multiple sub-circ... [more] |
VLD2008-119 CPSY2008-81 RECONF2008-83 pp.165-170 |
SDM |
2008-10-10 15:15 |
Miyagi |
Tohoku Univ. |
Correlation between Stress Induced Leakage Current and Random Telegraph Signal noise Yuki Kumagai, Akinobu Teramoto, Kenichi Abe, Takafumi Fujisawa, Syunichi Watabe, Tomoyuki Suwa, Naoto Miyamoto, Shigetoshi Sugawa, Tadahiro Ohmi (Tohoku Univ.) SDM2008-165 |
In this paper, we report the correlation between anomalous stress-induced leakage current (SILC) and random telegraph si... [more] |
SDM2008-165 pp.57-62 |
SDM |
2007-10-05 16:15 |
Miyagi |
Tohoku Univ. |
Statistical Evaluation of Characteristics Variability caused by Plasma Processes Syunichi Watabe, Shigetoshi Sugawa, Kenichi Abe, Takafumi Fujisawa, Naoto Miyamoto, Akinobu Teramoto, Tadahiro Ohmi (Tohoku Univ.) SDM2007-193 |
In this paper, we report the statistical evaluation of characteristics degradation in MOSFETs caused by plasma damages w... [more] |
SDM2007-193 pp.69-72 |
ICD, VLD |
2007-03-07 15:00 |
Okinawa |
Mielparque Okinawa |
Hardware/Software Automatic Partitioning using Behavioral Synthesis Daisuke Iwama, Naoto Miyamoto, Shigetoshi Sugawa, Tadahiro Ohmi (Tohoku Univ.) |
[more] |
VLD2006-111 ICD2006-202 pp.31-36 |
RECONF |
2005-09-15 11:30 |
Hiroshima |
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PELOC:An Automatic Place-and-Route Tool for Dynamically Reconfigurable FPGAs
-- Application to the Flexible Processor -- Naoto Miyamoto, Takeshi Ohkawa, Amir Jamak, Khan Ashfaquzzaman, Daisuke Iwama, Hiroaki Kanto, Koji Kotani, Shigetoshi Sugawa, Tadahiro Ohmi (Tohoku Univ.) |
[more] |
RECONF2005-32 pp.13-18 |
IE, SIP, ICD, IPSJ-SLDM |
2004-10-22 10:10 |
Yamagata |
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An Image Recognition Processor Using Dynamically Reconfigurable ALU Naoto Miyamoto, Koji Kotani (Tohoku University), Kazuyuki Maruo (Advantest), Tadahiro Ohmi (Tohoku University) |
An image recognition processor implementing phase only correlation (POC) algorithm is proposed. Arithmetic logical unit ... [more] |
SIP2004-91 ICD2004-123 IE2004-67 pp.13-18 |
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