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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 12 of 12  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
ED 2022-04-21
09:50
Online Online Influence of the thermal annealing temperature and atmosphere on channel conductance in the ZnO thin film transistor
Naoya Onizawa, Kazuki Yoshida, Kentarou Saitou, Kensaku Kanomata, Masanori Miura, Fumihiko Hirose (Yamagata Univ) ED2022-2
(To be available after the conference date) [more] ED2022-2
pp.5-8
CPM 2021-03-03
15:55
Online Online Fabrication of zinc oxide thin film by atomic layer deposition and trial production of thin film transistor
Naoya Onizawa, Keito Sogai, Kazuki Yoshida, Kentarou Saitou, Kensaku Kanomata, Masanori Miura, Bashir Ahmmad, Shigeru Kubota, Fumihiko Hirose (Yamagata Univ.) CPM2020-76
 [more] CPM2020-76
pp.71-73
VLD, CAS, MSS, SIP 2016-06-16
11:20
Aomori Hirosaki Shiritsu Kanko-kan Hardware Implementation of Stochastic Gammatone Filter
Naoya Onizawa, Shunsuke Koshita, Shuichi Sakamoto, Masahide Abe, Masayuki Kawamata, Takahiro Hanyu (Tohoku Univ.) CAS2016-6 VLD2016-12 SIP2016-40 MSS2016-6
This paper presents a design of a gammatone filter based on stochastic computation. The gammatone filter well expresses ... [more] CAS2016-6 VLD2016-12 SIP2016-40 MSS2016-6
pp.29-34
MBE, NC
(Joint)
2015-11-21
14:15
Miyagi Tohoku University Design of a Stochastic Gabor Filter for Highly Parallel Feature-Extraction Hardware
Daisaku Katagiri, Naoya Onizawa, Kazumichi Matsumiya (Tohoku Univ.), Warren Gross (McGill Univ.), Takahiro Hanyu (Tohoku Univ.) NC2015-43
 [more] NC2015-43
pp.35-40
ICD 2015-04-17
13:55
Nagano   [Tutorial Lecture] Nonvolatile Logic-in-Memory Architecture and Its Applications to Low-Power VLSI System
Takahiro Hanyu, Daisuke Suzuki, Akira Mochizuki, Masanori Natsui, Naoya Onizawa (Tohoku Univ.), Tadahiko Sugibayashi (NEC), Shoji Ikeda, Tetsuo Endoh, Hideo Ohno (Tohoku Univ.) ICD2015-12
 [more] ICD2015-12
pp.57-61
CPSY, DC 2014-04-25
15:55
Tokyo   Fault-tolerant logical integrated circuits based on stochastic computation
Daisaku Katagiri, Naoya Onizawa, Takahiro Hanyu (Tohoku Univ.) CPSY2014-6 DC2014-6
 [more] CPSY2014-6 DC2014-6
pp.27-31
CS, CAS, SIP 2014-03-07
09:30
Osaka Osaka City University Media Center Low-Power IP Lookup LSI Based on Sparse Clustered Networks
Naoya Onizawa (Tohoku Univ.), Warren J. Gross (McGill Univ.), Takahiro Hanyu (Tohoku Univ.) CAS2013-123 SIP2013-169 CS2013-136
 [more] CAS2013-123 SIP2013-169 CS2013-136
pp.193-198
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2011-11-28
13:00
Miyazaki NewWelCity Miyazaki Fault-Detectable 2-Color Code for Asynchronous Bidirectional Communication Links
Atsushi Matsumoto (Tohoku Univ.), Naoya Onizawa (McGill Univ.), Takahiro Hanyu (Tohoku Univ.) VLD2011-58 DC2011-34
 [more] VLD2011-58 DC2011-34
pp.37-42
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2011-11-30
10:55
Miyazaki NewWelCity Miyazaki Controller-Sharing Based Asynchronous Power-Gating Scheme and Its Application
Takao Kawano (Tohoku Univ.), Naoya Onizawa (McGill Univ.), Atsushi Matsumoto, Takahiro Hanyu (Tohoku Univ.) VLD2011-89 DC2011-65
In this paper, a new fine-grained power-gating technique is proposed. Fine-grained power-gating technique has the potent... [more] VLD2011-89 DC2011-65
pp.215-220
CPSY, DC
(Joint)
2010-08-03
- 2010-08-05
Ishikawa Kanazawa Cultural Hall Fault-Resilient Multiple-Valued Asynchronous Data-Transfer Scheme
Atsushi Matsumoto, Naoya Onizawa, Takahiro Hanyu (Tohoku Univ.) DC2010-15
In this paper, we propose an asynchronous data-transmission scheme which is robust against wire-fault on the communicati... [more] DC2010-15
pp.7-11
DC, CPSY 2010-04-13
15:10
Tokyo   Accurate Asynchronous Network-on-Chip Simulation Based on Reactive Delay Model
Tomoyoshi Funazaki, Naoya Onizawa, Atsushi Matsumoto, Takahiro Hanyu (RIEC, Tohoku Univ.) CPSY2010-3 DC2010-3
 [more] CPSY2010-3 DC2010-3
pp.9-14
CPSY, DC
(Joint)
2009-08-04
- 2009-08-05
Miyagi   A robust on-chip asynchronous data-transfer scheme based on multi-level current-mode signalling
Naoya Onizawa, Atsushi Matsumoto, Takahiro Hanyu (Tohoku Univ.), Tomohiro Yoneda (NII) DC2009-18
This paper presents a robust on-chip asynchronous data-trasnfer circuit based on multi-level current-mode signalling und... [more] DC2009-18
pp.1-6
 Results 1 - 12 of 12  /   
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