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Committee Date Time Place Paper Title / Authors Abstract Paper #
CPSY, DC, IPSJ-SLDM, IPSJ-EMB [detail] 2011-03-19
13:40		 Okinawa   Implementation and evaluation of Meresenne Twister with massive-parallel SIMD processing
Youhei Mochizuki, Naoyuki Yoshida, Naoki Matsumoto, Yuma Murakami, Takeshi Kumaki, Takeshi Fujino (Ritsumeikan Univ.) CPSY2010-78 DC2010-77		  [more] CPSY2010-78 DC2010-77
pp.273-278
VLD 2010-03-11
10:00		 Okinawa   Study of Via Programmable Logic Device VPEX for wiring architecture and Logic Array Block
Shouta Yamada, Yuuichi Kokushou, Tomohiro Nishimoto, Naoyuki Yoshida, Ryohei Hori, Naoki Matsumoto, Tatsuya Kitamori (Ritsumeikan Univ.), Masaya Yoshikawa (Meijou Univ.), Takeshi Fujino (Ritsumeikan Univ.) VLD2009-107		 We have developed the via-programmable logic device VPEX which was optimized for EB direct writing, and also developed t... [more] VLD2009-107
pp.49-54
VLD 2010-03-11
10:25		 Okinawa   Examination of the best basic logic gate architecture for Via programmable logic device
Ryohei Hori, Yuuichi Kokushou, Tomohiro Nishimoto, Shouta Yamada, Naoyuki Yoshida, Naoki Matsumoto, Takeshi Fujino (Ritsumei Univ.), Masaya Yoshikawa (Meijo Univ.) VLD2009-108		 The structured ASIC on which the logic can be customized with a few mask layers, have been studied in order to reduce in... [more] VLD2009-108
pp.55-60
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