Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2009-12-02 10:20 |
Kochi |
Kochi City Culture-Plaza |
A Circuit Design Method based on Foreknown Regularity between I/O Jin Sato, Tsugio Nakamura, Hiroshi Kasahara, Narito Fuyutsume (Tokyo Denki Univ.) CPM2009-134 ICD2009-63 |
The paper proposes a method of designing an arithmetic unit based on the regularity of the output depending on input pat... [more] |
CPM2009-134 ICD2009-63 pp.1-6 |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2009-12-02 10:40 |
Kochi |
Kochi City Culture-Plaza |
Implementation of Asynchronous Bus for GALS System Takehiro Hori, Tsugio Nakamura, Narito Fuyutsume, Hiroshi Kasahara, Teruo Tanaka (Tokyo Denki Univ.) CPM2009-135 ICD2009-64 |
Although asynchronous circuit can solve problems of power consumption, speed, noise, and clockskew, the transmission is ... [more] |
CPM2009-135 ICD2009-64 pp.7-12 |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2009-12-04 10:40 |
Kochi |
Kochi City Culture-Plaza |
A Proposal of Message Driven IP Core Interface Ryuta Sasaki, Tsugio Nakamura, Hiroshi Kasahara, Narito Fuyutsume (Tokyo Denki Univ.) CPSY2009-48 |
In a ULSI such as SoC, various IP cores developed by different firms are integrated into single-chip. Therefore problems... [more] |
CPSY2009-48 pp.31-36 |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2009-12-04 11:00 |
Kochi |
Kochi City Culture-Plaza |
A Proposal of a Computer Architecture for Numbers of Arbitrary Word Length and its Implementation
-- On the Instruction Control Unit -- Yuta Totsuka, Masamichi Makino, Tsugio Nakamura, Narito Fuyutsume, Hiroshi Kasahara (Tokyo Denki Univ.) CPSY2009-49 |
We propose the computer architecture with the instructions of four rules of arithmatic operations for numbers of arbitra... [more] |
CPSY2009-49 pp.37-42 |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2009-12-04 11:20 |
Kochi |
Kochi City Culture-Plaza |
A Proposal of a Computer Architecture for Numbers of Arbitrary Word Length and its Implementation
-- On the Memory Management Unit -- Masamichi Makino, Yuta Totsuka, Tsugio Nakamura, Narito Fuyutsume, Hiroshi Kasahara (Tokyo Denki Univ.) CPSY2009-50 |
We propose a computer architecture for numbers of arbitrary word length with unlimited processing data length. In this d... [more] |
CPSY2009-50 pp.43-48 |
VLD, CPSY, RECONF, IPSJ-SLDM |
2009-01-29 10:55 |
Kanagawa |
|
A Proposal of Message Driven IP Core Interface Ryuta Sasaki, Tsugio Nakamura, Narito Fuyutsume, Hiroshi Kasahara, Teruo Tanaka (Tokyo Denki Univ.) VLD2008-96 CPSY2008-58 RECONF2008-60 |
In a ULSI such as SoC, various IP cores with different development firms are integrated in single-chip. Therefore proble... [more] |
VLD2008-96 CPSY2008-58 RECONF2008-60 pp.31-36 |
VLD, CPSY, RECONF, IPSJ-SLDM |
2009-01-29 14:45 |
Kanagawa |
|
A Proposal of the Computer Architecture for Numbers of Arbitrary Word Length Shohei Hashimoto, Yuta Totsuka, Masamichi Makino, Hikaru Yasuda, Tsugio Nakamura, Narito Fuyutsume, Hiroshi Kasahara (Tokyo Denki Univ.) VLD2008-102 CPSY2008-64 RECONF2008-66 |
We propose a computer architecture for numbers of arbitrary word length with unlimited processing data length. In this d... [more] |
VLD2008-102 CPSY2008-64 RECONF2008-66 pp.63-68 |
VLD, CPSY, RECONF, IPSJ-SLDM |
2009-01-30 09:40 |
Kanagawa |
|
Foreknown Regularity Arithmetic Processing Unit Jin Sato, Tsugio Nakamura, Narito Fuyutsume, Hiroshi Kasahara, Teruo Tanaka (Tokyo Denki Univ.) VLD2008-111 CPSY2008-73 RECONF2008-75 |
The paper proposes a method of designing an arithmetic unit based on the regularity of the output depending on input pat... [more] |
VLD2008-111 CPSY2008-73 RECONF2008-75 pp.117-122 |
VLD, CPSY, RECONF, IPSJ-SLDM |
2009-01-30 14:45 |
Kanagawa |
|
Implementation of Asynchronous Bus for GALS System Takehiro Hori, Tsugio Nakamura, Narito Fuyutsume, Hiroshi Kasahara, Teruo Tanaka (Tokyo Denki Univ.) VLD2008-120 CPSY2008-82 RECONF2008-84 |
Although asynchronous circuit can solve problems of power consumption, speed, noise, and clockskew, the transmission is ... [more] |
VLD2008-120 CPSY2008-82 RECONF2008-84 pp.171-176 |
RCS, SIP |
2008-01-25 14:15 |
Hiroshima |
Hiroshima City Uni. |
Evaluation of The Handoff Scheme using RTT Akihiro Tabata, Narito Fuyutsume, Hiroshi Kasahara, Tsugio Nakamura (Tokyo Denki Univ.) SIP2007-175 RCS2007-178 |
The implementation of the wireless LAN on IEEE802.11DCF (Distributed Coordination Function) operates
the handoff by the... [more] |
SIP2007-175 RCS2007-178 pp.103-108 |
ICD, SIP, IE, IPSJ-SLDM |
2006-10-26 09:00 |
Miyagi |
|
A Cryptographic Communication Technique between IP cores in ULSI Masafumi Hayakawa (Tokyo Denki Univ.), Tsugio Nakamura (Kokusai junior colleg), Hiroshi Kasahara, Narito Fuyutsume, Teruo Tanaka (Tokyo Denki Univ.) |
The paper proposes a communication method between IP cores, including the standardization on the interface between IP co... [more] |
SIP2006-83 ICD2006-109 IE2006-61 pp.1-6 |
ICD, SIP, IE, IPSJ-SLDM |
2006-10-26 16:35 |
Miyagi |
|
A self-support oriented IP core design method Hiroyuki Hatakenaka (TDU), Tsugio Nakamura (Kokusai Junior College), Hiroshi Kasahara, Narito Fuyutsume, Teruo Tanaka (TDU) |
For designing an integrated circuit with the scale of System LSI or SoC,
it is reasonable to reuse the circulating IP c... [more] |
SIP2006-98 ICD2006-124 IE2006-76 pp.87-92 |