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Committee Date Time Place Paper Title / Authors Abstract Paper #
RECONF, VLD, CPSY, IPSJ-ARC, IPSJ-SLDM [detail] 2022-01-24
17:10
Online Online Ternarizing Deep Spiking Neural Network
Man Wu, Yirong Kan, Van_Tinh Nguyen, Renyuan Zhang, Yasuhiko Nakashima (NAIST) VLD2021-61 CPSY2021-30 RECONF2021-69
The feasibility of ternarizing spiking neural networks (SNNs) is studied in this work toward trading a slight accuracy f... [more] VLD2021-61 CPSY2021-30 RECONF2021-69
pp.67-72
VLD, DC, RECONF, ICD, IPSJ-SLDM
(Joint) [detail]
2021-12-02
09:20
Online Online Development of Spiking Neural Network with Mem Capacitor -- Reduction of recognition accuracy loss by improving the conversion method between synaptic strength and capacitance --
Atsushi Sawada, Reon Oshio, Mutsumi Kimura, Renyuan Zhang, Yasuhiko Nakashima (NAIST) VLD2021-32 ICD2021-42 DC2021-38 RECONF2021-40
Research on artificial intelligence is developing rapidly, and there is an increasing need for the development of comput... [more] VLD2021-32 ICD2021-42 DC2021-38 RECONF2021-40
pp.87-92
CPSY, DC, IPSJ-ARC [detail] 2021-07-21
16:15
Online Online Development of Spiking Neural Network Using Mem Capacitor
Atsushi Sawada, Reon Oshio, Takeshi Nomura, Renyuan Zhang, Mutsumi Kimura, Yasuhiko Nakashima (NAIST) CPSY2021-11 DC2021-11
In recent years, an increase in power consumption has become a problem as machine learning becomes more sophisticated. A... [more] CPSY2021-11 DC2021-11
pp.59-63
VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC
(Joint) [detail]
2018-12-07
14:35
Hiroshima Satellite Campus Hiroshima An Efficient Multiplier Employing Time-Encoded Stochastic Computing Circuit
Tati Erlina, Renyuan Zhang, Yasuhiko Nakashima (NAIST) CPSY2018-41
A compact multiplier circuit is designed by time-encoded stochastic computing technology. The operands of multiplication... [more] CPSY2018-41
pp.47-52
CPSY 2017-11-19
15:00
Aomori Aomori Tourist Information Center, ASPAM [Poster Presentation] A Programmable Analog Calculation Unit based on Support Vector Regression
Renyuan Zhang, Takashi Nakada, Yasuhiko Nakashima (NAIST) CPSY2017-55
This work explores an architecture of programmable analog circuitry to calculate arbitrary functions with acceptable acc... [more] CPSY2017-55
pp.27-32
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