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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 12 of 12  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
RCS, SR, SRW
(Joint)
2019-03-08
10:30
Kanagawa YRP 5G R&D Activities for High Capacity Technologies with Ultra High-Density Multi-Band and Multi-Access Layered Cells
Morihiko Minowa, Hiroyuki Seki (Fujitsu), Yukihiko Okumura, Satoshi Suyama (NTT DOCOMO), Jun Terada, Satoshi Shigematsu, Yasushi Takatori (NTT), Hiroaki Asano (Panasonic), Yukio Hirano (Mitsubishi Electric), Yasushi Yamao (UEC), Fumiyuki Adachi, Masataka Nakazawa (Tohoku Univ.) RCS2018-323
In this paper, we make a summary report of our 5G R&D activities for “High Capacity Technologies with Ultra High-Density... [more] RCS2018-323
pp.207-212
RCS, AP
(Joint)
2018-11-22
11:20
Okinawa Okinawa Industry Support Center Hardware Accelerator for Coordinated Radio-Resource Scheduling in 5G Ultra-high-density Distributed Antenna Systems
Yuki Arikawa, Takeshi Sakamoto, Shunji Kimura, Satoshi Shigematsu (NTT) RCS2018-208
This paper presents a novel radio-resource scheduler with a hardware accelerator for coordinated scheduling in 5G ultra-... [more] RCS2018-208
pp.173-178
RCS, CCS, SR, SRW
(Joint)
2016-03-04
09:50
Tokyo Tokyo Institute of Technology Basic Study on Coordinated Radio-resource Scheduler Architecture in Ultra-high-density Distributed Antenna Systems
Yuki Arikawa, Hiroyuki Uzawa, Satoshi Shigematsu (NTT) RCS2015-375
For fifth generation mobile communication systems (5G), in order to increase overall system throughput, ultra-high-densi... [more] RCS2015-375
pp.243-248
VLD 2016-03-01
09:00
Okinawa Okinawa Seinen Kaikan A Packet Lookup Engine LSI Based on Mismatch Detection and Hash Search
Yoshifumi Kawamura, Kousuke Imamura (Kanazawa Univ.), Naoki Miura, Masami Urano, Satoshi Shigematsu (NTT), Tetsuya Matsumura (Nihon Univ.), Yoshio Matsuda (Kanazawa Univ.) VLD2015-118
Developing an extremely efficient packet inspection algorithm for lookup engines is important to realize a high throughp... [more] VLD2015-118
pp.43-48
OCS, CS
(Joint)
2015-01-22
15:35
Tokushima Tokushima University [Special Invited Talk] Low-power Techniques for Network System on a Chip
Satoshi Shigematsu, Naoki Miura, Yuki Arikawa, Namiko Ikeda (NTT) CS2014-83
This paper presents examples of low-power circuit schemes for Network SoC and lowering power of network equipment by usi... [more] CS2014-83
pp.13-18
RECONF 2014-09-18
16:10
Hiroshima   Dynamically reconfigurable protocol-processing hardware for communications SoC
Saki Hatta, Nobuyuki Tanaka, Satoshi Shigematsu (NTT) RECONF2014-22
We propose an architecture of dynamically reconfigurable hardware for protocol processing (DRHPP) for a communications s... [more] RECONF2014-22
pp.29-34
CS 2014-07-03
15:30
Kagoshima Minamitanecho Shoukoukai Kaigishitsu [Invited Talk] Power Reduction and Demand Relaxation for Receiver by Optimizing Optical Power using BER for 10G-EPON Systems
Namiko Ikeda, Hiroyuki Uzawa, Kazuhiko Terada, Satoshi Shigematsu, Hiroshi Koizumi, Masami Urano (NTT) CS2014-27
In 10G-EPON systems, an optical power of an ONU transmitter and a dynamic range for a burst receiver of an OLT is define... [more] CS2014-27
pp.61-65
CS, OCS
(Joint)
2014-01-23
09:30
Tokyo Hajijo-jima Ohgagou Kouminkan Power Reduction by Adaptively Optimizing Optical Power using Actual BER for 10G-EPON Systems
Namiko Ikeda, Hiroyuki Uzawa, Kazuhiko Terada, Satoshi Shigematsu, Hiroshi Koizumi, Masami Urano (NTT) CS2013-96
10G-EPON systems are next generations of access network systems, and power consumptions of these systems increase becaus... [more] CS2013-96
pp.71-74
EST, MWP, OPE, MW, EMT, IEE-EMT [detail] 2013-07-18
13:40
Hokkaido Wakkanai Synthesis Cultural Center The estimation method of power consumption considering traffic characteristics for communications SoCs
Ritsu Kusaba, Hiroyuki Uzawa, Tomoaki Kawamura, Kenji Kawai, Yuki Arikawa, Satoshi Shigematsu (NTT) MW2013-52 OPE2013-21 EST2013-16 MWP2013-11
We proposed a method for estimating the power consumption of communications SoC. The method consists of three steps. The... [more] MW2013-52 OPE2013-21 EST2013-16 MWP2013-11
pp.39-44
MWP, OPE, MW, EMT, EST, IEE-EMT [detail] 2012-07-26
13:40
Hokkaido Hokkaido Univ. BER Calculation Modeling for 10G-EPON Systems
Namiko Ikeda, Kazuhiko Terada, Hiroyuki Uzawa, Akihiko Miyazaki, Satoshi Shigematsu, Masami Urano, Tsugumichi Shibata (NTT) MW2012-31 OPE2012-24 EST2012-13 MWP2012-12
In 10G-EPON systems, the high speed access networks in the next generation, the upper limits of the bit error rate (BER)... [more] MW2012-31 OPE2012-24 EST2012-13 MWP2012-12
pp.47-52
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2010-11-30
10:45
Fukuoka Kyushu University FPGA design and test methodology for communication frame processinng
Ritsu Kusaba, Kenji Kawai, Sadayuki Yasuda, Satoshi Shigematsu, Mamoru Nakanishi, Masami Urano (NTT) VLD2010-67 DC2010-34
For large-scale and high-speed frame processing on a FPGA board, we propose a new design method based on the property of... [more] VLD2010-67 DC2010-34
pp.73-78
VLD 2009-03-12
11:05
Okinawa   High-Speed Packet-Filter Circuit with Mismatch-Detection Circuit
Naoki Miura, Satoshi Shigematsu, Takahiro Hatano (NTT), Yusuke Akamine (Kyushu Univ.), Mamoru Nakanishi, Masami Urano (NTT) VLD2008-143
(To be available after the conference date) [more] VLD2008-143
pp.101-106
 Results 1 - 12 of 12  /   
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