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All Technical Committee Conferences (All Years)
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| Search Results: Conference Papers |
| Conference Papers (Available on Advance Programs) (Sort by: Date Descending) |
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| Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
| IPSJ-SLDM, RECONF, VLD, CPSY, IPSJ-ARC [detail] |
2020-01-24
16:40 |
Kanagawa |
Raiosha, Hiyoshi Campus, Keio University |
Study of stacked type logic LSI with fabrication technology of 3D flash memory.
Fumiya Suzuki, Shigeyoshi Watanabe (Shonan Inst of Tech.)  VLD2019-93 CPSY2019-91 RECONF2019-83 |
[more] |
VLD2019-93 CPSY2019-91 RECONF2019-83
pp.233-238 |
| SDM |
2019-11-07
16:20 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Study of stacked type logic circuit with fabrication technology of 3D flash memory.
-- Design of full adder and low power. --
Fumiya Suzuki, Shigeyoshi Watanabe (Shonan Inst. of Tech.) SDM2019-73 |
[more] |
SDM2019-73
pp.21-25 |
| SDM, ED, CPM |
2019-05-16
13:50 |
Shizuoka |
Shizuoka Univ. (Hamamatsu) |
Study of new stacked full adder circuit with fabrication technology of 3D flash memory.
Fumiya Suzuki, Shigeyoshi Watanabe (Shonan Inst. of Tech.) ED2019-12 CPM2019-3 SDM2019-10 |
[more] |
ED2019-12 CPM2019-3 SDM2019-10
pp.9-13 |
| VLD, IPSJ-SLDM |
2019-05-15
15:00 |
Tokyo |
Ookayama Campus, Tokyo Institute of Technology |
Study of new stacked type logic circuit scheme with fabrication technology of 3D flash memory
Fumiya Suzuki, Shigeyoshi Watanabe (Shonan Inst. of Tech.) VLD2019-3 |
[more] |
VLD2019-3
pp.19-23 |
| RECONF |
2019-05-09
14:10 |
Tokyo |
Tokyo Tech Front |
Study of new stacked type logic circuit scheme with fabrication technology of 3D flash memory.
Fumiya Suzuki, Shigeyoshi Watanabe (Shonan Inst. of Tech.) RECONF2019-4 |
[more] |
RECONF2019-4
pp.17-21 |
| SDM, ICD, ITE-IST [detail] |
2018-08-08
14:35 |
Hokkaido |
Hokkaido Univ., Graduate School of IST M Bldg., M151 |
Proposal of reconfigurable system LSI with 3D flashtechnology and its application to combinationlogic, FF circuit and FPGA
Shigeyoshi Watanabe (Shonan Insti. of Tech.) SDM2018-42 ICD2018-29 |
[more] |
SDM2018-42 ICD2018-29
pp.91-94 |
| RECONF |
2017-09-25
15:25 |
Tokyo |
DWANGO Co., Ltd. |
Proplsal of reconfigurable system LSI with BiCS technology
-- Application to combination logic, FF, CMOS circuit and FPGA --
Shigeyoshi Watanabe (Shonan Inst. of Tech.), Tomohiro Yokota (DNP Data Techno), Shouto Tamai (Oi Electric), Takumi Sato (Japan Business Systems) RECONF2017-28 |
[more] |
RECONF2017-28
pp.37-42 |
| RECONF |
2016-09-05
15:35 |
Toyama |
Univ. of Toyama |
Proposal of vertical stacked reconfigurable Fe-FET NAND logic and its application to combination logic, flip-flop and LUT
Shigeyoshi Watanabe (Shonan Inst. of Tech.), Tomohiro Yokota (DNP Data Techno), Shoto Tamai (Oi Electric), Takumi Sato (Shonan Inst. of Tech.) RECONF2016-29 |
[more] |
RECONF2016-29
pp.23-28 |
| SDM |
2016-06-29
11:35 |
Tokyo |
Campus Innovation Center Tokyo |
Proposal of vertical stacked type Fe-FET NAND logic and its application to system LSI
Shigeyoshi Watanabe (Shonan Inst. Tech.), Tomohiro Yokota (Data Techno) SDM2016-36 |
[more] |
SDM2016-36
pp.21-26 |
| VLD, CPSY, RECONF, IPSJ-SLDM, IPSJ-ARC [detail] |
2016-01-19
10:40 |
Kanagawa |
Hiyoshi Campus, Keio University |
Circuit Design of Reconfigurable Logic and Comparison of the Methods
Junki Kato, Shigeyoshi Watanabe, Hiroshi Ninomiya, Manabu Kobayashi, Yasuyuki Miura (SIT) VLD2015-77 CPSY2015-109 RECONF2015-59 |
[more] |
VLD2015-77 CPSY2015-109 RECONF2015-59
pp.1-6 |
| SDM, ICD |
2015-08-25
10:20 |
Kumamoto |
Kumamoto City |
Circuit Design of Reconfigurable Dynamic Logic and Estimation of Number of Elements
Junki Kato, Shigeyoshi Watanabe, Hiroshi Ninomiya, Manabu Kobayashi, Yasuyuki Miura (SIT) SDM2015-66 ICD2015-35 |
[more] |
SDM2015-66 ICD2015-35
pp.47-52 |
| RECONF, CPSY, VLD, IPSJ-SLDM [detail] |
2015-01-29
10:45 |
Kanagawa |
Hiyoshi Campus, Keio University |
Circuit Design and Valuation of Reconfigurable Logic Circuit.
Junki Kato, Shigeyoshi Watanabe, Hiroshi Ninomiya, Manabu Kobayashi, Yasuyuki Miura (SIT) VLD2014-119 CPSY2014-128 RECONF2014-52 |
[more] |
VLD2014-119 CPSY2014-128 RECONF2014-52
pp.35-40 |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail] |
2014-11-27
16:50 |
Oita |
B-ConPlaza |
Circuit Design of Reconfigurable Dynamic Logic
Junki Kato, Shigeyoshi Watanabe, Hiroshi Ninomiya, Manabu Kobayashi, Yasuyuki Miura (Shonan Inst. of Tech.) CPM2014-126 ICD2014-69 |
[more] |
CPM2014-126 ICD2014-69
pp.21-26 |
| SDM |
2014-10-17
15:20 |
Miyagi |
Niche, Tohoku Univ. |
Design method of stacked type NAND MRAM
Shigeyoshi Watanabe (Shonan Inst. of Tech), Shoto Tamai (Oi Electric Co. LTD.) SDM2014-95 |
[more] |
SDM2014-95
pp.69-74 |
| ICD, SDM |
2014-08-05
14:20 |
Hokkaido |
Hokkaido Univ., Multimedia Education Bldg. |
Circuit Design of Reconfigurable Dynamic Logic Based on Double Gate MOSFETs
Junki Kato, Shigeyoshi Watanabe, Hiroshi Ninomiya, Manabu Kobayashi, Yasuyuki Miura (SIT) SDM2014-78 ICD2014-47 |
[more] |
SDM2014-78 ICD2014-47
pp.87-92 |
| SDM |
2013-10-18
13:00 |
Miyagi |
Niche, Tohoku Univ. |
Design method of stacked type non-volatile memory
Shigeyoshi Watanabe (Shonan Inst. of Tech.) SDM2013-96 |
[more] |
SDM2013-96
pp.41-46 |
| SDM |
2012-11-16
15:20 |
Tokyo |
Kikai-Shinko-Kaikan Bldg |
Design method of system LSI and SEA cell type DRAM with tunneling type transistor.
Ryosuke Suzuki, Shigeyoshi Watanabe (Shonan Inst. of Tech) SDM2012-113 |
[more] |
SDM2012-113
pp.75-80 |
| SDM |
2012-11-16
15:45 |
Tokyo |
Kikai-Shinko-Kaikan Bldg |
Design Technology of stacked Type Chain PRAM Readout
Sho Kato, Shigeyoshi Watanabe (Shonan Inst, of Tech,) SDM2012-114 |
[more] |
SDM2012-114
pp.81-86 |
| ICD, SDM |
2012-08-02
16:45 |
Hokkaido |
Sapporo Center for Gender Equality, Sapporo, Hokkaido |
Design Technology of stacked Type Chain PRAM Readout
Sho Kato, Shigeyoshi Watanabe (SIT) SDM2012-76 ICD2012-44 |
[more] |
SDM2012-76 ICD2012-44
pp.71-76 |
| ICD, SDM |
2012-08-03
09:00 |
Hokkaido |
Sapporo Center for Gender Equality, Sapporo, Hokkaido |
Design of system LSI/memory with low power tunneling type transistor.
Ryosuke Suzuki, Shigeyoshi Watanabe (Shonan Inst. of Tech.) SDM2012-77 ICD2012-45 |
[more] |
SDM2012-77 ICD2012-45
pp.77-81 |
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