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All Technical Committee Conferences (Searched in: All Years)
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Search Results: Conference Papers |
Conference Papers (Available on Advance Programs) (Sort by: Date Descending) |
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Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
EE |
2016-11-28 13:30 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
[Poster Presentation]
Study of Ultra-low voltage oscillator for Energy Harvesting Satoshi Hashimoto, Tsutomu Yoshimura, Takao Kihara, Hiroshi Makino, Shuhei Iwade (Osaka Tech), Yoshio Matsuda (Kanazawa Univ.) EE2016-35 |
Recently, the energy harvesting such as the power generation with the electromagnetic wave energy and the thermoelectric... [more] |
EE2016-35 pp.29-33 |
ICD |
2012-12-17 15:55 |
Tokyo |
Tokyo Tech Front |
[Poster Presentation]
A New Approach of the Analysis of the ISF in Oscillators with a Closed-Loop Control Junki Mizuno, Tsutomu Yoshimura, Shuhei Iwade, Hiroshi Makino (OIT), Yoshio Matsuda (Kanazawa Univ.) ICD2012-97 |
The derivation of the impulse sensitivity function (ISF) of oscillators are widely used for the evaluation of the phase ... [more] |
ICD2012-97 pp.37-40 |
ICD |
2012-12-17 15:55 |
Tokyo |
Tokyo Tech Front |
[Poster Presentation]
Analysis of the Pull-in Range in a CDR-PLL with the Nonlinearity of the Phase Detector Shinji Shimizu, Tsutomu Yoshimura, Shuhei Iwade, Hiroshi Makino (OIT), Yoshio Matsuda (Kanazawa Univ.) ICD2012-100 |
The analysis of the lock-in process of CDR-PLLs using the nonlinear model of the phase detector is presented. The analys... [more] |
ICD2012-100 pp.45-48 |
ICD |
2011-12-15 16:10 |
Osaka |
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[Poster Presentation]
The design of TDC and ADPLL circuits considering metastable operations Yasuyuki Shimizu (Osaka Inst. Tech.), Giichi Sakemi, Tsutomu Yoshimura, Shuhei Iwade, Hiroshi Makino (OIT), Yoshio Matsuda (Kanazawa Univ.) ICD2011-104 |
[more] |
ICD2011-104 pp.25-27 |
ICD |
2011-12-15 16:10 |
Osaka |
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[Poster Presentation]
Simulation and Analysis of the Interference Noise between PLL circuits. Ken Maruhashi, Junki Mizuno, Tsutomu Yoshimura, Shuhei Iwade, Hiroshi Makino (Osaka Inst. Tech.), Yoshio Matsuda (Kanazawa Univ.) ICD2011-110 |
When the multiple PLL circuits are laid out on a single IC chip, the influence of the interference between PLL circuits ... [more] |
ICD2011-110 pp.57-58 |
ICD |
2010-12-16 15:10 |
Tokyo |
RCAST, Univ. of Tokyo |
[Poster Presentation]
A Study of Pull-in Lock Simulation in CDR-PLL Yasuyuki Shimizu (Osaka Inst. Tech.), Tsutomu Yoshimura, Shuhei Iwade, Hiroshi Makino (OIT), Yoshio Matsuda (Kanazawa Univ.) ICD2010-107 |
[more] |
ICD2010-107 p.71 |
ICD |
2010-12-16 15:10 |
Tokyo |
RCAST, Univ. of Tokyo |
[Poster Presentation]
Comparison and Analysis of the Noise Sensitivity between LC-tank and Ring-type VCO Ken Maruhashi, Tsutomu Yoshimura, Shuhei Iwade, Hiroshi Makino (Osaka Inst. Tech.), Yoshio Matsuda (Kanazawa Univ.) ICD2010-108 |
[more] |
ICD2010-108 p.73 |
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