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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| ICD | 2016-04-14 14:15 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Invited Lecture]
ReRAM reliability characterization and improvement by machine learning Tomoko Ogura Iwasaki, Sheyang Ning, Hiroki Yamazawa, Chao Sun, Shuhei Tanakamaru, Ken Takeuchi (Chuo Univ.)  ICD2016-8 |
The low voltage and fast program capability of ReRAM is very attractive for next-generation memory applications, but the... [more] | ICD2016-8 pp.39-44 |
| ICD | 2016-04-15 10:20 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Invited Lecture]
Highly Reliable Method for Long-Term Semiconductor Data Storage Tomonori Takahashi, Senju Yamazaki, Shuhei Tanakamaru, Tomoko Ogura Iwasaki, Shogo Hachiya, Ken Takeuchi (Chuo Univ.) |
[more] | |
| ICD | 2015-04-16 15:15 |
Nagano | [Invited Talk]
Reliability enhancement techniques of TLC NAND Flash Solid-State Drives (SSDs) for archive and enterprise applications Shogo Hachiya, Shuhei Tanakamaru, Tsukasa Tokutomi, Masafumi Doi, Yuta Kitamura, Senju Yamazaki, Atsuro Kobayashi, Ken Takeuchi (Chuo Univ.) ICD2015-5 |
[more] | ICD2015-5 pp.21-26 |
|
| ICD, IPSJ-ARC | 2015-01-29 14:45 |
Kanagawa | Analysis of Relation between Performance and Reliability of NAND Flash memory/Storage-class memory Hybrid SSD Hirofumi Takishita (Chuo Univ), Shuhei Tanakamaru (Chuo Univ/Univ. of Tokyo), Shogo Hosaka, Koh Johguchi, Ken Takeuchi (Chuo Univ) ICD2014-111 |
[more] | ICD2014-111 pp.7-12 |
|
| ICD, CPSY | 2014-12-01 15:15 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Poster Presentation]
Performance Analysis of the Hybrid SSDs in Consideration of Error-correcting code Hirofumi Takishita, Shuhei Tanakamaru, Takahiro Onagi, Ken Takeuchi (Chuo Univ) ICD2014-88 CPSY2014-100 |
The performance of SSDs is guaranteed by error-correcting code (ECC). The longer parity size of ECC is, the higher error... [more] | ICD2014-88 CPSY2014-100 p.55 |
| ICD | 2014-04-17 11:45 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Invited Lecture]
Hybrid Storage of ReRAM/TLC NAND Flash with RAID-5/6 for Cloud Data Centers Hiroki Yamazawa, Tsukasa Tokutomi (Chuo Univ.), Shuhei Tanakamaru, Sheyang Ning (Chuo Univ./Univ. of Tokyo), Ken Takeuchi (Chuo Univ.) ICD2014-4 |
A hybrid storage architecture of ReRAM and TLC (3bit/cell) NAND Flash with RAID-5/6 is developed to meet cloud data-cent... [more] | ICD2014-4 pp.15-20 |
| ICD | 2014-01-28 15:00 |
Kyoto | Kyoto Univ. Tokeidai Kinenkan | [Poster Presentation]
An Optimum Asymmetric Coding in Each Number of PE Cycle for 1Xnm NAND Flash Memories Senju Yamazaki (Chuo Univ), Shuhei Tanakamaru (Univ of Tokyo), Ken Takeuchi (Chuo Univ) ICD2013-106 |
The asymmetric coding increases the population of ‘1’s or ‘0’s in programming data to reduce bit errors, and thus reliab... [more] | ICD2013-106 p.19 |
| ICD | 2014-01-28 15:00 |
Kyoto | Kyoto Univ. Tokeidai Kinenkan | [Poster Presentation]
Error-Prediction LDPC for NAND Flash Memory Tsukasa Tokutomi (Chuo Univ.), Shuhei Tanakamaru (Chuo Univ./Univ. of Tokyo.), Ken Takeuchi (Chuo Univ.) ICD2013-108 |
Error-Prediction LDPC (EP-LDPC) error correcting code (ECC) was proposed to improve the reliability of NAND flash memori... [more] | ICD2013-108 p.23 |
| ICD | 2014-01-28 15:00 |
Kyoto | Kyoto Univ. Tokeidai Kinenkan | [Poster Presentation]
Performance Analysis of the Hybrid SSDs with NAND Flash Memory/Storage Class Memory Shogo Hosaka (Chuo Univ.), Shuhei Tanakamaru (Chuo Univ./Univ. of Tokyo), Koh Johguchi, Ken Takeuchi (Chuo Univ.) ICD2013-113 |
flash memory/storage class memory (SCM) hybrid solid-state drives (SSDs) achieve high performance and low consumption co... [more] | ICD2013-113 p.35 |
| ICD | 2014-01-28 15:00 |
Kyoto | Kyoto Univ. Tokeidai Kinenkan | [Poster Presentation]
Analyzing Data-Retention Characteristics of ReRAM Hiroki Yamazawa (Chuo Univ.), Shuhei Tanakamaru (Chuo Univ./Univ. of Tokyo), Ken Takeuchi (Chuo Univ.) ICD2013-114 |
Resistive RAM (ReRAM) is one of the most promising candidates for next generation nonvolatile memories due to its potent... [more] | ICD2013-114 p.37 |
| ICD | 2014-01-28 15:00 |
Kyoto | Kyoto Univ. Tokeidai Kinenkan | [Poster Presentation]
Reliability Evaluation of NAND Flash Memories Yuta Kitamura (Chuo Univ.), Shuhei Tanakamaru (Chuo Univ./Univ. of Tokyo), Ken Takeuchi (Chuo Univ) ICD2013-117 |
NAND flash memory operates as a memory by inserting/removing electrons to/from floating gate (FG) by a high voltage. Sin... [more] | ICD2013-117 p.43 |
| ICD | 2013-04-12 10:20 |
Ibaraki | Advanced Industrial Science and Technology (AIST) | [Invited Talk]
Unified Solid-State-Storage Architecture with NAND Flash Memory and ReRAM that Tolerates 32× Higher BER for Big-Data Applications Shuhei Tanakamaru (Chuo Univ./Univ. of Tokyo), Masafumi Doi, Ken Takeuchi (Chuo Univ.) ICD2013-14 |
Unified solid-state storage (USSS) with hybrid NAND flash memory / ReRAM provides high system-level data protection. Fou... [more] | ICD2013-14 pp.67-72 |
| ICD | 2012-12-17 15:55 |
Tokyo | Tokyo Tech Front | [Poster Presentation]
Analyses of Code Length Dependence of Asymmetric Code for Highly Reliable SSDs with 20-40nm NAND Flash Memories Masafumi Doi (Chuo Univ.), Shuhei Tanakamaru (Chuo Univ./Univ. of Tokyo), Ken Takeuchi (Chuo Univ.) ICD2012-95 |
Asymmetric code was proposed for highly reliable SSDs. The asymmetric code increases the population of “1”s or “0”s in p... [more] | ICD2012-95 p.33 |
| MRIS, ITE-MMS | 2012-10-18 13:30 |
Akita | AIT | [Tutorial Invited Lecture]
Overview and future perspectives of Solid-State Drives (SSDs) Ken Takeuchi, Shuhei Tanakamaru, Yuki Yanagihara (Chuo Univ.) MR2012-19 |
[more] | MR2012-19 pp.1-6 |
| ICD | 2012-04-23 16:00 |
Iwate | Seion-so, Tsunagi Hot Spring (Iwate) | [Invited Talk]
Over-10x-Extended-Lifetime 76%-Reduced-Error Solid-State Drives (SSDs) with Error-Prediction LDPC Architecture and Error-Recovery Scheme Shuhei Tanakamaru, Yuki Yanagihara, Ken Takeuchi (Univ. Tokyo) ICD2012-5 |
[more] | ICD2012-5 pp.23-28 |
| ICD | 2011-04-18 14:20 |
Hyogo | Kobe University Takigawa Memorial Hall | [Invited Talk]
Highly reliable low power SSD
-- Data modulation signal processing technologies of memory cotroller -- Ken Takeuchi, Shuhei Tanakamaru, Chinglin Hung (Univ. Tokyo) ICD2011-5 |
[more] | ICD2011-5 pp.27-32 |
| ICD | 2011-04-19 11:45 |
Hyogo | Kobe University Takigawa Memorial Hall | Suppress of Half Select Disturb in 8T-SRAM by Local Injected Electron Asymmetric Pass Gate Transistor Kousuke Miyaji, Kentaro Honda, Shuhei Tanakamaru (Univ. of Tokyo), Shinji Miyano (STARC), Ken Takeuchi (Univ. of Tokyo) ICD2011-13 |
8T-SRAM cell with asymmetric pass gate transistor by local electron injection is proposed to solve half select disturb. ... [more] | ICD2011-13 pp.71-76 |
| ICD, IPSJ-ARC | 2011-01-21 14:50 |
Kanagawa | Keio University (Hiyoshi Campus) | High Error Rate Compensation Architecture and ECC for SSDs with NV-RAM and NAND Flash Mayumi Fukuda, Kazuhide Higuchi, Shuhei Tanakamaru, Ken Takeuchi (Univ. of Tokyo) |
An adaptive codeword ECC is proposed for NV-RAM/NAND integrated SSDs. The acceptable raw bit error rate of NV-RAM and NA... [more] | ICD2010-139 pp.75-80 |
| ICD | 2010-12-16 09:30 |
Tokyo | RCAST, Univ. of Tokyo | Elimination of Half Select Disturb in 8T-SRAM by Local Injected Electron Asymmetric Pass Gate Transistor Kentaro Honda, Kousuke Miyaji, Shuhei Tanakamaru (Univ. of Tokyo), Shinji Miyano (STARC), Ken Takeuchi (Univ. of Tokyo) ICD2010-95 |
8T-SRAM cell with asymmetric pass gate transistor by local electron injection is proposed to solve half select disturb. ... [more] | ICD2010-95 pp.1-6 |
| ICD | 2010-12-16 13:50 |
Tokyo | RCAST, Univ. of Tokyo | High Error Rate Compensation Architecture and ECC for SSDs with NV-RAM and NAND Flash Kazuhide Higuchi, Mayumi Fukuda, Shuhei Tanakamaru, Ken Takeuchi (Univ. Tokyo) ICD2010-99 |
In this paper, we propose the adaptive codeword ECC (Error Correcting Code) for NV-RAM (Non Volatile RAM) and NAND flash... [more] | ICD2010-99 pp.25-30 |
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