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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
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Committee Date Time Place Paper Title / Authors Abstract Paper #
ICD 2023-04-10
14:10		 Kanagawa
(Primary: On-site, Secondary: Online)		 ICD2023-5 The information retrieval processors are processors that take over the information retrieval processing that current com... [more] ICD2023-5
pp.10-13
DC 2017-02-21
16:35		 Tokyo Kikai-Shinko-Kaikan Bldg. Design for Evaluation of TSV based Interconnections in 3D-SIC -- Interconnection Resistance Evaluation with Analog Boundary Scan --
Shuichi Kameyama (Ehime Univ./Fujitsu), Senling Wang, Hiroshi Takahashi (Ehime Univ.) DC2016-83		 This paper introduces a concept of Design for Evaluation (DFE) that is a design method to embed circuits for quality eva... [more] DC2016-83
pp.53-58
DC 2016-02-17
15:15		 Tokyo Kikai-Shinko-Kaikan Bldg. Analog Circuit Design for a Precision Resistance Measurement of TSVs
Senling Wang, Keisuke Kagawa (Ehime Univ.), Shuichi Kameyama (Fujitsu), Yoshinobu Higami, Hiroshi Takahashi (Ehime Univ.) DC2015-94		  [more] DC2015-94
pp.49-54
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]		 2015-12-03
11:40		 Nagasaki Nagasaki Kinro Fukushi Kaikan Implementation of Precision Resistance Measurement of TSVs Using Analog Boundary Scan
Senling Wang, Keisuke Kagawa (Ehime Univ.), Shuichi Kameyama (Fujitsu), Yoshinobu Higami, Hiroshi Takahashi (Ehime Univ.) VLD2015-65 DC2015-61		  [more] VLD2015-65 DC2015-61
pp.177-182
DC 2012-02-13
14:00		 Tokyo Kikai-Shinko-Kaikan Bldg. A new problem at Boundary-Scan testing -- an internal disruption within IC during interconnect testing --
Shuichi Kameyama (Fujitsu & Ehime Univ.), Masayuki Baba (Fujitsu), Yoshinobu Higami, Hiroshi Takahashi (Ehime Univ.) DC2011-81		 The miniaturization of electronic products is causing printed circuit boards to progress in the direction of higher dens... [more] DC2011-81
pp.31-35
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