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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
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Committee Date Time Place Paper Title / Authors Abstract Paper #
NC, MBE
(Joint)
2020-03-05
16:10
Tokyo University of Electro Communications
(Cancelled but technical report was issued)
Improvement of neuronal ensemble inference by Monte Carlo method and applying to real data
Shun Kimura, Koujin Takeda (Ibaraki Univ.), Keisuke Ota (Riken) NC2019-101
In this work, we propose an improved inference algorithm for neuronal ensembles, which can classify neurons into ensembl... [more] NC2019-101
pp.149-154
IE, ITS, ITE-AIT, ITE-HI, ITE-ME, ITE-MMS, ITE-CE [detail] 2017-02-21
15:00
Hokkaido Hokkaido Univ. A Study on Behavior Classification based on Driving Data for Moved Trajectory Correction of Motorcycle
Shun Kimura, Hiroyuki Hatano, Masahiro Fujii, Atsushi Ito, Yu Watanabe (Utsunomiya Univ.), Tomoya Kitani (Shizuoka Univ.) ITS2016-74 IE2016-132
Motorcycles have characters that are susceptible to road surface conditions and move the full range in lanes.
By these ... [more]
ITS2016-74 IE2016-132
pp.405-410
US 2015-06-19
15:40
Kumamoto Kumamoto University Development of Simultaneous Measurement System of Object Surface Shape and Two-dimensional Flow Mapping by using Ultrasonic Array Sensor.
Takuya Kawachi, Shun Kimura, Tomonori Ihara, Hiroshige Kikura (Tokyo Tech), Kazushi Kimoto (Okayama Univ.) US2015-23
Inspection technique was developed for severely damaged nuclear reactor vessel, especially for Fukusima Dai-ichi nuclear... [more] US2015-23
pp.39-44
VLD, ICD 2008-03-07
14:40
Okinawa TiRuRu Implementation and Evaluation of Network Security using An Embedded Programmable Logic Matrix (ePLX)
Mitsutaka Matsumoto, Shun Kimura (Ritsumeikan Univ.), Hirofumi Nakano, Takenobu Iwao, Yoshihiro Okuno, Kazutami Arimoto (Renesas Technology Corp.), Tomonori Izumi, Takeshi Fujino (Ritsumeikan Univ.) VLD2007-165 ICD2007-188
Low Cost Network Appliance with low power microprocessor must be connected with networks in order to realize ubiquitous ... [more] VLD2007-165 ICD2007-188
pp.53-58
VLD, CPSY, RECONF, IPSJ-SLDM 2007-01-18
13:25
Tokyo Keio Univ. Hiyoshi Campus Analysis of design architecture of ePLX ( embedded Programmable Logic matriX) and Evaluation of circuit mapping
Tomoo Hishida, Kouta Ishibashi, Shun Kimura, Naoki Okuno, Mitsutaka Matsumoto (Ritsumeikan Univ.), Hirofumi Nakano, Takenobu Iwao, Yoshihiro Okuno, Kazutami Arimoto (Renesas Technology), Tomonori Izumi, Takeshi Fujino (Ritsumeikan Univ.)
Recently, non-recurring engineering costs (NREs), including cost of mask-sets, and engineering design efforts are critic... [more] VLD2006-100 CPSY2006-71 RECONF2006-71
pp.37-42
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