| IEICE Technical Committee Submission System Conference Schedule |
Online Proceedings [Sign in] Tech. Rep. Archives |
All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| VLD, ICD | 2008-03-05 14:40 |
Okinawa | TiRuRu | An Energy-efficent ASIP Synthesis Method Based on Reducing Bit-width of Instruction Memory Shunitsu Kohara, Youhua Shi, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki (Waseda Univ.)  VLD2007-141 ICD2007-164 |
[more] | VLD2007-141 ICD2007-164 pp.25-30 |
| VLD, ICD | 2008-03-07 14:15 |
Okinawa | TiRuRu | Application-Oriented Dynamic Reconfigurable Network Processor Architecture and Its Optimization Method Motonori Ohta, Shunitsu Kohara, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki (Waseda Univ) VLD2007-164 ICD2007-187 |
In this paper, we propose an application directional dynamic reconfigurable network processor architecture and its optim... [more] | VLD2007-164 ICD2007-187 pp.47-52 |
| RECONF, CPSY, VLD, IPSJ-SLDM | 2008-01-17 16:00 |
Kanagawa | Hiyoshi Campus, Keio University | A Processor Kernel Generation Method for Application Processors Toshihiro Hiura, Shunitsu Kohara, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki (Waseda Univ.) VLD2007-132 CPSY2007-75 RECONF2007-78 |
This paper proposes a processor kernel generation method for HW/SW co-design system named SPADES. SPADES is a system to ... [more] | VLD2007-132 CPSY2007-75 RECONF2007-78 pp.83-88 |
| CAS, SIP, VLD | 2007-06-22 13:00 |
Hokkaido | Hokkaido Tokai Univ. （Sapporo) | Scalable Dual-Radix Unified Montgomery Multiplier in GF(p) and GF(2n) Kazuyuki Tanimura, Ryuta Nara, Shunitsu Kohara, Youhua Shi, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki (Waseda Univ.) CAS2007-26 VLD2007-42 SIP2007-56 |
Modular multiplication is the dominant arithmetic operation in elliptic curve cryptography (ECC), which is one of public... [more] | CAS2007-26 VLD2007-42 SIP2007-56 pp.43-48 |
| VLD, IPSJ-SLDM | 2007-05-11 11:20 |
Kyoto | Kyodai Kaikan | An SIMD MSD Multiplier based on variable GF($2^m$) for Elliptic Curve Cryptosystem Ryuta Nara, Kazunori Shimizu, Shunitsu Kohara, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki (Waseda Univ.) VLD2007-11 |
Originally elliptic curve cryptosystem (ECC) hardware are often required to operate variable key length. Digit-serial mu... [more] | VLD2007-11 pp.25-29 |
| NS, IN (Joint) |
2007-03-08 10:30 |
Okinawa | Okinawa Convention Center | A Clustering Technique for Energy Consumption Reduction in Wireless Sensor Network Fumiaki Hirose, Shunitsu Kohara, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki (Waseda Univ.) NS2006-165 |
Recently, the wireless sensor network is expected as a new communications infrastructure technology in the ubiquitous ... [more] |
NS2006-165 pp.41-46 |
| ICD, VLD | 2007-03-08 08:30 |
Okinawa | Mielparque Okinawa | A Processing Unit Optimization Algorithm in SIMD Processor Cores Design Hiroyuki Shigeta, Shunitsu Kohara, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki (Waseda Univ.) |
[more] | VLD2006-119 ICD2006-210 pp.1-6 |
| ICD, VLD | 2007-03-08 08:50 |
Okinawa | Mielparque Okinawa | A Hardware/Software Partitioning Framework for SIMD Processor Cores Masataka Ohigashi, Shunitsu Kohara, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki (Waseda Univ.) |
[more] | VLD2006-120 ICD2006-211 pp.7-12 |
| ICD, VLD | 2007-03-08 09:10 |
Okinawa | Mielparque Okinawa | SIMD Instructions Generation Algorithm for Multiple Loop for SIMD Processor Cores Optimum Design Hiroki Nakajima, Shunitsu Kohara, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki (Waseda Univ.) |
The hardware/software cosynthesis system named SPADES which synthesize a processor with packed SIMD type instructions ne... [more] | VLD2006-121 ICD2006-212 pp.13-18 |
| ICD, VLD | 2007-03-08 09:30 |
Okinawa | Mielparque Okinawa | An Application Specific Data Optimization System for Processor Cores and Its Experimental Evaluation Kazuhisa Horiuchi, Shunitsu Kohara, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki (Waseda Univ.) |
[more] | VLD2006-122 ICD2006-213 pp.19-24 |
| ICD, VLD | 2007-03-09 10:20 |
Okinawa | Mielparque Okinawa | A Consideration of MPEG-A Photo Player Meta-data Generation System Design with Hardware Acceleration for Mobile Devices Masato Motohashi, Shunitsu Kohara, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki (Waseda Univ.) |
[more] | VLD2006-145 ICD2006-236 pp.31-36 |
| VLD, CPSY, RECONF, IPSJ-SLDM | 2007-01-17 15:15 |
Tokyo | Keio Univ. Hiyoshi Campus | GF(2^m) Digit-Serial Multiplier for Elliptic Curve Cryptosystem Ryuta Nara, Shunitsu Kohara, Kazunori Shimizu, Nozomu Togawa, Takeshi Ikenaga, Masao Yanagisawa, Satoshi Goto, Tatsuo Ohtsuki (Waseda Univ) |
[more] | VLD2006-89 CPSY2006-60 RECONF2006-60 pp.25-30 |
| VLD, CPSY, RECONF, IPSJ-SLDM | 2007-01-18 11:00 |
Tokyo | Keio Univ. Hiyoshi Campus | CoDaMa: An XML-based Framework for Manipulating CDFGs Shunitsu Kohara, Youhua Shi, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki (Waseda Univ.) |
This paper proposes an XML--based framework to manipulate CDFGs (Control Data Flow Graphs) for HW/SW (Hardware / Softwar... [more] | VLD2006-97 CPSY2006-68 RECONF2006-68 pp.19-24 |
| RECONF, CPSY, VLD, DC, IPSJ-SLDM, IPSJ-ARC (Joint) [detail] |
2006-11-30 13:55 |
Fukuoka | Kitakyushu International Conference Center | A Forwarding Unit Optimization Method for Application Processors Toshihiro Hiura, Shunitsu Kohara, Youhua Shi, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki (Waseda Univ.) |
[more] | VLD2006-80 DC2006-67 pp.49-54 |
| SIP, CAS, VLD | 2006-06-22 13:30 |
Hokkaido | Kitami Institute of Technology | Area/delay Estimation for Application Processor Daisuke Yamazaki, Shunitsu Kohara, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki (Waseda Univ.) |
This paper proposes an area/delay estimation method with configurable pipeline stages and controller structure.In HW/SW ... [more] | CAS2006-1 VLD2006-14 SIP2006-24 pp.1-6 |
| SIP, CAS, VLD | 2006-06-23 09:50 |
Hokkaido | Kitami Institute of Technology | A Functional Unit Design of Motion Estimator on DSP for H.264/AVC Encoding Toyokazu Takahashi, Shunitsu Kohara, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki (Waseda Univ.) |
The improved coding efficiency in H.264/AVC comes from higher computational complexity. Most of the complexity is caused... [more] | CAS2006-10 VLD2006-23 SIP2006-33 pp.13-18 |
| ICD, VLD | 2006-03-09 11:05 |
Okinawa | Improved Network Processor for Dynamic Packet Flows and Its Experimental Evaluations Hidetaka Tabuchi, Shunitsu Kohara, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki (Waseda Univ.) |
[more] | VLD2005-112 ICD2005-229 pp.25-30 |
|
[Return to Top Page]