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Committee Date Time Place Paper Title / Authors Abstract Paper #
IPSJ-SLDM, RECONF, VLD, CPSY, IPSJ-ARC [detail] 2019-01-30
14:20		 Kanagawa Raiosha, Hiyoshi Campus, Keio University Study of stacked full adder circuit with fabrication technology of 3D flash memory
Fumiya Suzuki, Sigeyoshi Watanabe (Shonan Inst. of Tech.) VLD2018-77 CPSY2018-87 RECONF2018-51		  [more] VLD2018-77 CPSY2018-87 RECONF2018-51
pp.31-35
SDM 2018-11-09
15:30		 Tokyo Kikai-Shinko-Kaikan Bldg. Study of new stacked type logic circuit scheme with fabrication technology of 3D flash memory.
Fumiya Suzuki, Sigeyoshi Watanabe (Shonan Inst. of Tech) SDM2018-75		  [more] SDM2018-75
pp.53-57
SDM, ICD, ITE-IST [detail] 2018-08-08
15:00		 Hokkaido Hokkaido Univ., Graduate School of IST M Bldg., M151 Study of new stacked type logic circuit with fabrication technology of 3D NAND flash memory -- Comparison with conventional LUT scheme, and planar typescheme --
Fumiya Suzuki, Sigeyoshi Watanabe (Shonan Inst. of Tech.) SDM2018-43 ICD2018-30		 Novel new stacked type logic circuit with fabrication technology of 3D flash memory has been newly proposed. Also, These... [more] SDM2018-43 ICD2018-30
pp.95-100
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