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All Technical Committee Conferences (Searched in: All Years)
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| Search Results: Conference Papers |
| Conference Papers (Available on Advance Programs) (Sort by: Date Descending) |
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| Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
| ICD, VLD |
2007-03-08
11:50 |
Okinawa |
Mielparque Okinawa |
Low Power and High Speed Clock Distribution Technique for 90-nm CMOS LSIs
Yousuke Hagiwara, Suguru Nagayama, Nobuaki Kobayashi, Tadayoshi Enomoto (Chuo Univ.) |
[more] |
VLD2006-128 ICD2006-219
pp.55-60 |
| ICD, SDM |
2006-08-17
17:00 |
Hokkaido |
Hokkaido University |
Low Dynamic Power and High Speed 90-nm CMOS Clock Driver
Yousuke Hagiwara, Suguru Nagayama, Nobuaki Kobayashi, Tadayoshi Enomoto (Chuo Uni.) |
The power dissipation (PT) and delay time (tT) of CMOS clock network, that consisted of a clock driver and register circ... [more] |
SDM2006-140 ICD2006-94
pp.87-92 |
| ICD |
2005-12-16
09:50 |
Kochi |
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A Low Dynamic Power and Low Leakage Power 90-nm CMOS Clock Driver
Suguru Nagayama, Tadayoshi Enomoto (Chuo Univ.) |
A technique, which can minimize not only an active power (Pat) and an stand-by power (Pst) but also a delay time (td) of... [more] |
ICD2005-194
pp.13-18 |
| VLD, ICD |
2005-03-10
- 2005-03-11 |
Okinawa |
Mielparque Okinawa |
Low-Power High-Speed 180-nm CMOS Clock Driver
Suguru Nagayama, Tadayoshi Enomoto (Chuo Univ.) |
[more] |
VLD2004-128 ICD2004-224
pp.23-28 |
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