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Committee Date Time Place Paper Title / Authors Abstract Paper #
SIS 2011-03-03
Tokyo Tokyo City University (Setagaya Campus) An FPGA-based fast classifier with high generalization property
Tadayoshi Horita (Polytechnic Univ.), Itsuo Takanami SIS2010-54
 [more] SIS2010-54
Kanagawa   An Experimental Linux Cluster System for Tests
Koichi Kitano (Polytech.Univ.), Koji Teramoto (EHDO), Tadayoshi Horita (Polytech.Univ.) VLD2008-104 CPSY2008-66 RECONF2008-68
Most computer cluster, which is produced by a company, is so expensive compared to a PC, and the versions of its operati... [more] VLD2008-104 CPSY2008-66 RECONF2008-68
DC 2008-10-20
Tokyo National Center of Sciences Fault-Tolerant Multilayer Neural Networks for Multiple Weight-and-Neuron-Fault
Kazuhiro Nishimura (Polytech Univ.), Masato Ootsu (JP Network), Tadayoshi Horita (Polytech Univ.), Itsuo Takanami (Ichinoseki kousen (former)) DC2008-22
The architecture of artificial neural networks, which are derived from brain mechanisms, are quite different from ordina... [more] DC2008-22
DC 2008-10-20
Tokyo National Center of Sciences An implementation of a fault-tolerant 2D systolic array on an FPGA and its evaluation
Tadayoshi Horita (Polytechnic Univ.), Itsuo Takanami (Ichinoseki National College of Tech. in former times) DC2008-23
A fault-tolerant self-reconfigurable 2D systolic array to calculate matrix multiplications is implemented on an FPGA.
... [more]
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