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Committee Date Time Place Paper Title / Authors Abstract Paper #
ICD, ITE-CE 2007-12-13
16:50		 Kochi   A Low Dynamic Power and Low Leakage Power 90-nm CMOS SRAM with Wide Operating Margin
Takeshi Iwanari, Nobuaki Kobayashi, Tadayoshi Enomoto (Chuo Univ.) ICD2007-127		 A large “write” operating margin, low-power, low leakage power 90-nm CMOS 2K-bit SRAM was fabricated incorporating a new... [more] ICD2007-127
pp.41-46
ICD, VLD 2007-03-07
14:20		 Okinawa Mielparque Okinawa A 90-nm CMOS Motion Estimation Processor for MPEG4 implementing Dynamic Voltage and Frequency Scaling
Yuhgo Ishikawa, Tatsuya Kaneko, Takeshi Iwanari, Hiroaki Nakayama, Toshihiro Tsutusi, Yousuke Hagiwara, Nobuaki Kobayashi, Tadayoshi Enomoto (Chuo Univ.) 		 [more] VLD2006-110 ICD2006-201
pp.25-30
ICD, VLD 2007-03-08
10:50		 Okinawa Mielparque Okinawa A 90-nm SRAM for Video Signal Processors implementing Dynamic Voltage and Frequency Scaling
Takeshi Iwanari, Nobuaki Kobayashi, Tadayoshi Enomoto (Chuo Univ.) 		 [more] VLD2006-125 ICD2006-216
pp.37-42
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