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Committee Date Time Place Paper Title / Authors Abstract Paper #
SDM, VLD 2007-10-31
15:00
Tokyo Kikai-Shinko-Kaikan Bldg. Scaled CMOS Modeling on Analog Small Signal parameters
Takeshi Kida, Shin-ichi Ohkawa, Hiroo Masuda (Renesas) VLD2007-67 SDM2007-211
In sub-100-nm device, mismatch characteristics of threshold voltage and drain current have been degraded. This phenomeno... [more] VLD2007-67 SDM2007-211
pp.35-39
SDM, VLD 2007-10-31
15:50
Tokyo Kikai-Shinko-Kaikan Bldg. Technical Trends of Mismatch Modeling on Analog CMOS Circuit
Hiroo Masuda, Takeshi Kida, Shin-ichi Ohkawa (Renesas) VLD2007-69 SDM2007-213
In sub-100-nm device, mismatch characteristics of threshold voltage and drain current have been degraded. This phenomeno... [more] VLD2007-69 SDM2007-213
pp.47-54
ICD, ITE-CE 2006-12-15
09:50
Hiroshima   Modeling and Simulation of Mismatch Characteristics on Analog CMOS Circuits
Takeshi Kida, Shin-ichi Ohkawa, Hiroo Masuda (Renesas)
 [more] ICD2006-160
pp.97-102
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