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All Technical Committee Conferences (Searched in: All Years)

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Conference Papers (Available on Advance Programs) (Sort by: Date Descending)

Committee	Date Time	Place		Paper Title / Authors	Abstract	Paper #
VLD	2008-09-29 16:40	Ishikawa		Design and Evalution of a Butterfly Circuit Using Selector Logic by Bit-Level Transformation Takeshi Namura, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki (Waseda Univ.), Motonobu Tonomura (Dai Nippon Print) VLD2008-52	An arithmetic circuit using selector logic has been proposed, as a high computational approach for processing. In thi... [more]	VLD2008-52 pp.31-36
VLD, IPSJ-SLDM	2008-05-08 16:15	Hyogo	Kobe Univ.	Radix-2 Butterfly Circuit Architecture Using Selector Logic Takeshi Namura, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki (Waseda Univ.), Motonobu Tonomura (Dai Nippon Print) VLD2008-5	An arithmetic circuit using selector logic has been proposed, as a high computational approach for processing. In thi... [more]	VLD2008-5 pp.25-30

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