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Committee Date Time Place Paper Title / Authors Abstract Paper #
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]		 2013-11-27
14:05		 Kagoshima   Improved via programmable structured ASIC VPEX3S -- Improvement of basic logic element to improve operation speed --
Taku Otani, Ryohei Hori (Ritsumeikan Univ.), Masaya Yoshikawa (Meijo Univ.), Takeshi Fujino (Ritsumeikan Univ.) VLD2013-70 DC2013-36		 We have been studying via programmable structured ASIC architecture “VPEX3(Via Programmable Logic using Exclusive-OR Arr... [more] VLD2013-70 DC2013-36
pp.75-80
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]		 2013-11-27
14:30		 Kagoshima   New Via Programmable Architecture VPEX4 (1) -- Development of new logic element for improvement of routability and power consumption --
Ryohei Hori, Taku Otani, Tatsuro Hitomi, Shota Ueguchi (Ritsumeikan Univ.), Masaya Yoshikawa (Meijo Univ.), Takeshi Fujino (Ritsumeikan Univ.) VLD2013-71 DC2013-37		 The Non-Recruring Engineering (NRE) cost of LSI is increasing drastically with the advances in LSI process and manufactu... [more] VLD2013-71 DC2013-37
pp.81-86
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]		 2013-11-27
14:55		 Kagoshima   Evaluation of Via Programmable Device named VPEX using benchmark circuits
Shota Ueguchi, Ryohei Hori, Taku Otani (Ritsumeikan Univ.), Masaya Yoshikawa (Meijyo Univ.), Takeshi Fujino (Ritsumeikan Univ.) VLD2013-72 DC2013-38		 Non-Recurring engineering cost including photo-mask cost increases with LSI process minimization. We have been studied v... [more] VLD2013-72 DC2013-38
pp.87-92
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]		 2012-11-28
09:50		 Fukuoka Centennial Hall Kyushu University School of Medicine Performance evaluation of Via Programmable Logic VPEX using P&R tool
Taku Otani, Ryohei Hori, Taisuke Ueoka (Ritsumeikan Univ), Masaya Yoshikawa (Meijo Univ), Takeshi Fujino (Ritsumeikan Univ) VLD2012-90 DC2012-56		 We have been studying via programmable structured ASIC architecture “VPEX” which can realize arbitrary logic by customiz... [more] VLD2012-90 DC2012-56
pp.177-182
VLD 2012-03-06
10:35		 Oita B-con Plaza Performance evaluation and Improvement of Via Programmable Logic VPEX
Taku Otani, Ryohei Hori, Tatsuya Kitamori, Taisuke Ueoka (Ritsumeikan Univ.), Masaya Yoshikawa (Meijo Univ.), Takeshi Fujino (Ritsumeikan Univ.) VLD2011-121		 We have been studying via programmable structured ASIC architecture “VPEX” which can realize arbitrary logic by customiz... [more] VLD2011-121
pp.7-12
 Results 1 - 5 of 5  /   
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