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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
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Committee Date Time Place Paper Title / Authors Abstract Paper #
CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] 2017-03-09
15:30		 Okinawa Kumejima Island Approach to Direct Memory Access for Tamper Resistant System using Secure Processor
Rihito Suzuki, Takuya Kajiwara, Mizuki Miyanaga, Hidetsugu Irie, Shuichi Sakai (UTokyo) CPSY2016-138 DC2016-84		 In an environment using secure processor to support secure program execution, because of its integrity check mechanism, ... [more] CPSY2016-138 DC2016-84
pp.39-44
CPSY, IPSJ-ARC 2016-10-06
10:00		 Chiba Makuhari-messe [Poster Presentation] Multi-Processor System Design with Secure Processors
Takuya Kajiwara, Mizuki Miyanaga, Hidetsugu Irie, Shuichi Sakai (UTokyo) CPSY2016-43		 A secure processor enables secure computing
by protecting data from malicious users by encryption
of data and integri... [more]		 CPSY2016-43
pp.7-10
RECONF 2014-09-18
14:10		 Hiroshima   Prototype of fault tolerant FPGA using 65nm CMOS process
Motoki Amagasaki, Takuya Kajiwara, Kentaro Fujisawa, Qian Zhao, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.) RECONF2014-18		 我々はSoC（System on a Chip）に搭載されるFPGA-IP（Field Programmable Gate Array Intellectual
Property）コアに焦点をあてたFT-FPGA（Fault Tolera... [more]		 RECONF2014-18
pp.7-12
RECONF 2014-06-12
11:15		 Miyagi Katahira Sakura Hall Three-dimensional FPGA Structure using High-speed Serial Communication
Takuya Kajiwara, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.) RECONF2014-7		 The three-dimensional (3D) integrated circuit technology is expected to continually improve the LSI (Large Scale Integra... [more] RECONF2014-7
pp.31-36
 Results 1 - 4 of 4  /   
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