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Committee Date Time Place Paper Title / Authors Abstract Paper #
SANE 2016-06-24
13:50
Ibaraki Tsukuba Space Center, JAXA High Level Synthesis based FPGA Implementation Scheme of On-board Image Processing Algorithm
Takayuki Ishida (JAXA), Kazuki Kariya (SOKENDAI), Seisuke Fukuda (JAXA), Tomoo Kinoshita, Kunihiro Kajihara (Soliton Systems) SANE2016-15
(To be available after the conference date) [more] SANE2016-15
pp.31-36
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2011-11-29
09:00
Miyazaki NewWelCity Miyazaki Synthesis of efficient data fetch mechanism from the high level communication description
Masato Minato, Yuki Ando, Seiya Shibata (Nagoya Univ.), Tomoo Kinoshita (Soliton Systems), Shinya Honda, Hiroaki Takada (Nagoya Univ.) VLD2011-67 DC2011-43
This paper presents efficient data fetch mechanism for the FIFO-based implementation generated by SystemBuilder, a syste... [more] VLD2011-67 DC2011-43
pp.91-96
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