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All Technical Committee Conferences (Searched in: All Years)
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Search Results: Conference Papers |
Conference Papers (Available on Advance Programs) (Sort by: Date Descending) |
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Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
NC, NLP, IPSJ-BIO [detail] |
2010-06-19 15:10 |
Okinawa |
Ryukyu-daigaku-gozyu-syunen-kinenn-kaikan |
Probabilistic Fault Diagnosis in Large Scale Multicomputer Systems Manabu Kobayashi, Toshinori Takabatake, Shinya Amano (Shonan Inst. of Tech.), Shigeichi Hirasawa (Cyver Univ.) NLP2010-23 NC2010-23 |
F.P.Preparata et al.\ have proposed a fault diagnosis model to find all fault nodes in the multiprocessor system by usin... [more] |
NLP2010-23 NC2010-23 pp.205-210 |
ICD, SDM |
2007-08-23 13:40 |
Hokkaido |
Kitami Institute of Technology |
Energy comparison between various supply voltage scheme for System LSI Satoshi Hanami, Shigeyoshi Watanabe, Manabu Kobayashi, Toshinori Takabatake (SIT) SDM2007-149 ICD2007-77 |
[more] |
SDM2007-149 ICD2007-77 pp.47-50 |
ICD, SDM |
2007-08-23 14:05 |
Hokkaido |
Kitami Institute of Technology |
Design of high-speed low-power dual-supply-voltage sysytem LSI taking into account of gate/sub-threshold leakage current Shigeyoshi Watanabe, Satoshi Hanami, Manabu Kobayashi, Toshinori Takabatake (SIT) SDM2007-150 ICD2007-78 |
[more] |
SDM2007-150 ICD2007-78 pp.51-56 |
SDM |
2007-03-15 16:15 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Design method of low-power dual-supply-voltage system LSI taking into account various leakage current of MOSFET Shigeyoshi Watanabe, Satoshi Hanami, Manabu Kobayashi, Toshinori Takabatake (SIT) |
[more] |
SDM2006-261 pp.39-44 |
ICD, VLD |
2007-03-09 15:20 |
Okinawa |
Mielparque Okinawa |
Design method of low-power dual-supply-voltage system LSI taking into account gate/subthreshold leakage current of MOSFET Shigeyoshi Watanabe, Satoshi Hanami, Manabu Kobayashi, Toshinori Takabatake (Shonan Institute of Tech.) |
[more] |
VLD2006-153 ICD2006-244 pp.75-80 |
ICD, SIP, IE, IPSJ-SLDM |
2006-10-27 10:50 |
Miyagi |
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Design method of low-power dual-supply-voltage system LSI taking into account leakage current of MOSFET Shigeyoshi Watanabe, Masaki Kanai, Akira Nagasawa, Satoshi Hanami, Manabu Kobayashi, Toshinori Takabatake (SIT) |
Reduction of power dissipation caused by dynamic current, gate leakage current, and subthreshold leakage current of dual... [more] |
SIP2006-106 ICD2006-132 IE2006-84 pp.31-36 |
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