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Committee Date Time Place Paper Title / Authors Abstract Paper #
ICD, SDM 2007-08-24
16:05
Hokkaido Kitami Institute of Technology A 45nm 2port 8T-SRAM using hierarchical replica bitline technique with immunity from simultaneous R/W access issues
Satoshi Ishikura, M. Kurumada, Toshio Terano, Yoshinobu Yamagami, Naoki Kotani, Katsuji Satomi (Matushita Electric Industrial), Koji Nii, Makoto Yabuuchi, Yasumasa Tsukamoto, Shigeki Ohbayashi, Toshiyuki Oashi, Hiroshi Makino, Hirofumi Shinohara (Renesas Technology), Hironori Akamatsu (Matushita Electric Industrial) SDM2007-168 ICD2007-96
We propose a new 2port SRAM with a 8T single-read-bitline (SRBL) memory cell for 45nm SOCs. Access time tends to be slow... [more] SDM2007-168 ICD2007-96
pp.145-148
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