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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 20 of 24  /  [Next]  
Committee Date Time Place Paper Title / Authors Abstract Paper #
RECONF 2015-06-20
14:00
Kyoto Kyoto University On the Evaluation Board AISTino equipped with the Fourth Flex Power FPGA chip with SOTB transistors
Hanpei Koike, Masakazu Hioki, Yasuhiro Ogasahara (AIST), Hayato Ishigaki, Toshiyuki Tsutsumi (Meiji Univ.), Tadashi Nakagawa, Toshihiro Sekigawa (AIST) RECONF2015-22
Flex Power FPGA utilizes threshold voltage programmability to reduce its static power by the body bias control of circui... [more] RECONF2015-22
pp.119-124
RECONF, CPSY, VLD, IPSJ-SLDM [detail] 2015-01-30
11:10
Kanagawa Hiyoshi Campus, Keio University The proposal of the convex area maze router on LSI design automation
Yohei Horino, Jun Hirayama, Yukiko Ohishi, Toshiyuki Tsutsumi (Meiji Univ.) VLD2014-138 CPSY2014-147 RECONF2014-71
We developed the convex area maze router that extends the channel intersection maze router as a high-speed routing algor... [more] VLD2014-138 CPSY2014-147 RECONF2014-71
pp.163-168
RECONF 2014-09-18
17:20
Hiroshima   On The Second Flex Power FPGA Chip with SOTB Transistors
Hanpei Koike (AIST), Chao Ma (Meiji Univ.), Masakazu Hioki, Yasuhiro Ogasahara (AIST), Toshiyuki Tsutsumi (Meiji Univ.), Tadashi Nakagawa, Toshihiro Sekigawa (AIST) RECONF2014-24
 [more] RECONF2014-24
pp.41-46
RECONF 2014-06-12
10:25
Miyagi Katahira Sakura Hall Improvement of Implementability by Exploring Routing Architecture in Flex Power FPGA
Masakazu Hioki, Toshihiro Sekigawa, Tadashi Nakagawa, Yasuhiro Ogasahara (AIST), Toshiyuki Tsutsumi (Meiji Univ.), Hanpei Koike (AIST) RECONF2014-5
(To be available after the conference date) [more] RECONF2014-5
pp.21-25
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2013-11-28
13:45
Kagoshima   Evaluation of The First Flex Power FPGA chip with SOTB transistors
Chao Ma (AIST/Meiji Univ.), Masakazu Hioki (AIST), Takashi Kawanami (KIT), Yasuhiro Ogasahara, Tadashi Nakagawa, Toshihiro Sekigawa (AIST), Toshiyuki Tsutsumi (AIST/Meiji Univ.), Hanpei Koike (AIST) RECONF2013-53
Flex Power FPGA was able to utilize a programmable threshold voltage to each circuit block of the FPGA by using the body... [more] RECONF2013-53
pp.77-82
DC 2013-02-13
13:30
Tokyo Kikai-Shinko-Kaikan Bldg. Characteristic Analysis of Signal Delay for Resistive Open Fault Detection
Hiroto Ohguri, Hiroyuki Yotsuyanagi, Masaki Hashizume (Univ. of Tokushima), Toshiyuki Tsutsumi, Koji Yamazaki (Meiji Univ.), Yoshinobu Higami, Hiroshi Takahashi (Ehime Univ.) DC2012-84
When a resistive open fault occurs, signal delay at the faulty wire may degrade circuit performance. However, a resistiv... [more] DC2012-84
pp.25-30
DC 2012-06-22
14:20
Tokyo Room B3-1 Kikai-Shinko-Kaikan Bldg [Invited Talk] Empirical study for signal integrity-defects
Hiroshi Takahashi, Yoshinobu Higami (Ehime Univ.), Toshiyuki Tsutsumi, Koji Yamazaki (Meiji Univ.), Hiroyuki Yotsuyanagi, Masaki Hashizume (Univ. Tokushima) DC2012-12
We try to empirically study signal integrity-defects.
In this study, we analyze the resistive open fault that causes th... [more]
DC2012-12
pp.21-26
RECONF 2012-05-29
11:00
Okinawa Tiruru (Naha Okinawa, Japan) Development of a demonstration system for Ultra-low-power FPGA with Fine-Grained Field-Programmable Threshold Voltage Control
Takashi Kawanami (KIT), Masakazu Hioki (AIST), Yohei Matsumoto (Kaiyo Univ.), Toshiyuki Tsutsumi (Meiji Univ.), Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike (AIST) RECONF2012-5
The Flex Power FPGA is a new FPGA architecture which enabled high speed operation and low power-consumption by fine-grai... [more] RECONF2012-5
pp.25-30
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2010-12-01
09:50
Fukuoka Kyushu University Fabrication in Low Power Process and Evaluation of Power Reconfigurable Field Programmable Gate Array
Masakazu Hioki (AIST), Takashi Kawanami (KIT), Yohei Matsumoto (TUMSAT), Toshiyuki Tsutsumi (Meiji Univ.), Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike (AIST) RECONF2010-45
Flex Power FPGA that is FPGA with power reconfigurability aims at the reduction of static power. The reduction of off cu... [more] RECONF2010-45
pp.37-42
DC 2010-02-15
10:25
Tokyo Kikai-Shinko-Kaikan Bldg. Modeling resistive open faults and generating their tests
Hiroshi Takahashi, Yoshinobu Higami, Yuta Shudo, Yuji Takamune, Yuzo Takamatsu (Ehime Univ.), Toshiyuki Tsutsumi, Koji Yamazaki (Meiji Univ.), Hiroyuki Yotsuyanagi, Masaki Hashizume (Univ. of Tokushima) DC2009-68
In order to solve the problem of signal integrity, we propose an extended delay fault model for modeling a resistive ope... [more] DC2009-68
pp.19-24
DC 2010-02-15
16:05
Tokyo Kikai-Shinko-Kaikan Bldg. Consideration of Open Faults Model Based on Digital Measurement of TEG Chip
Toshiyuki Tsutsumi (Meiji Univ.), Yasuyuki Kariya, Koji Yamazaki (Meiji Univ), Masaki Hashizume, Hiroyuki Yotsuyanagi (Tokushima Univ), Hiroshi Takahashi, Yoshinobu Higami, Yuzo Takamatsu (Ehime Univ) DC2009-77
Countermeasures against an open fault in LSI testing become more important with advancement of LSI process technology. ... [more] DC2009-77
pp.75-80
RECONF 2009-09-17
15:40
Tochigi Utsunomiya Univ. Design and Fabrication of Flex Power FPGA with Power Reconfigurability
Masakazu Hioki (AIST), Takashi Kawanami (Kanazawa Inst. of Tech.), Yohei Matsumoto (AIST), Toshiyuki Tsutsumi (Meiji Univ.), Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike (AIST) RECONF2009-25
Our research group has evaluated “Flex Power FPGA” which can reconfigure the power from the viewpoint of software and ha... [more] RECONF2009-25
pp.37-42
DC 2009-02-16
14:15
Tokyo   On Tests to Detect Open faults with Considering Adjacent Lines
Tetsuya Watanabe, Hiroshi Takahashi, Yoshinobu Higami (Ehime Univ.), Toshiyuki Tsutsumi, Koji Yamazaki (Meiji Univ.), Hiroyuki Yotsuyanagi, Masaki Hashizume (Univ, Tokushima), Yuzo Takamatsu (Ehime Univ.) DC2008-74
In modern manufacturing technologies with the shrinking of manufacturing process, LSIs may have several metal interconne... [more] DC2008-74
pp.37-42
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2008-11-17
14:15
Fukuoka Kitakyushu Science and Research Park Analysis of Open Fault using TEG Chip
Toshiyuki Tsutsumi, Yasuyuki Kariya, Koji Yamazaki (Meiji Univ), Masaki Hashizume, Hiroyuki Yotsuyanagi (Tokushima Univ), Hiroshi Takahashi, Yoshinobu Higami, Yuzo Takamatsu (Ehime Univ) VLD2008-63 DC2008-31
The high integration of the semiconductor technology advances, and the fault detection and the failure diagnosis of LSI ... [more] VLD2008-63 DC2008-31
pp.19-24
DC 2008-06-20
15:50
Tokyo Kikai-Shinko-Kaikan Bldg Improving the Diagnostic Quality of Open Faults
Koji Yamazaki, Toshiyuki Tsutsumi (Meiji Univ.), Hiroshi Takahashi, Yoshinobu Higami, Takashi Aikyo (Ehime Univ.), Hiroyuki Yotsuyanagi, Masaki Hashizume (Tokushima Univ.), Yuzo Takamatsu (Ehime Univ.) DC2008-16
With the shrinking process technologies and the use of copper process, open defects on interconnect wires, contacts and ... [more] DC2008-16
pp.29-34
DC 2008-02-08
09:25
Tokyo Kikai-Shinko-Kaikan Bldg. Fault Diagnosis for Dyinamic Open Faults with Considering Adjacent Lines
Hiroshi Takahashi, Yoshinobu Higami, Takashi Aikyo, Syuhei Kadoyama, Tetsuya Watanabe, Yuzo Takamatsu (Ehime Univ.), Toshiyuki Tsutsumi, Kouji Yamazaki (Meiji Univ.), Hiroyuki Yotsuyanagi, Masaki Hashizume (Univ. of Tokushima) DC2007-68
In modern manufacturing technologies with the shrinking of manufacturing process, LSIs may have several metal interconne... [more] DC2007-68
pp.7-12
VLD, CPSY, RECONF, IPSJ-SLDM 2007-01-18
10:35
Tokyo Keio Univ. Hiyoshi Campus Development of C-Compiler for Educational Microprocessor COMET II
Ken Matsuda, Akira Sato, Kensuke Mori, Toshiyuki Tsutsumi (Meiji Univ.)
 [more] VLD2006-96 CPSY2006-67 RECONF2006-67
pp.13-18
RECONF 2006-09-14
15:45
Kumamoto Kumamoto Univ. Yield enhancement of FPGAs with intra-die variation using multiple configuration data
Yohei Matsumoto, Masakazu Hioki, Takashi Kawanami (AIST), Toshiyuki Tsutsumi (Meiji Univ.), Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike (AIST)
 [more] RECONF2006-25
pp.29-34
RECONF 2006-05-18
14:15
Miyagi TOHOKU UNIVERSITY Detail Analysis of Optimal Body Bias Voltage Set for Flex Power FPGA
Takashi Kawanami, Masakazu Hioki, Yohei Matsumoto (AIST), Toshiyuki Tsutsumi (AIST/MEIJI), Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike (AIST)
The Flex Power FPGA is a new FPGA architecture which enabled high speed operation and low power-consumption by controlli... [more] RECONF2006-4
pp.19-24
RECONF, CPSY, VLD, IPSJ-SLDM 2006-01-18
10:00
Kanagawa   Optimization of Body Bias Voltage Set for Threshold Voltage Control in Flex Power FPGA
Takashi Kawanami, Masakazu Hioki, Yohei Matsumoto (AIST), Toshiyuki Tsutsumi (AIST/MEIJI), Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike (AIST)
The Flex Power FPGA is a new FPGA architecture which enabled high speed operation and low power-consumption by controlli... [more] VLD2005-97 CPSY2005-53 RECONF2005-86
pp.1-6
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