IEICE Technical Committee Submission System
Conference Schedule
Online Proceedings
[Sign in]
Tech. Rep. Archives
    [Japanese] / [English] 
( Committee/Place/Topics  ) --Press->
 
( Paper Keywords:  /  Column:Title Auth. Affi. Abst. Keyword ) --Press->

All Technical Committee Conferences  (All Years)

Search Results: Conference Papers
 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 15 of 15  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
EA, US
(Joint)
2022-12-22
16:50
Hiroshima Satellite Campus Hiroshima [Poster Presentation] Data augmentation method for machine learning on speech data
Tsubasa Maruyama (Tokyo Tech), Tsutomu Ikegami (AIST), Toshio Endo (Tokyo Tech), Takahiro Hirofuchi (AIST)
 [more]
EA, US
(Joint)
2021-12-22
13:30
Kumamoto Sojo University [Poster Presentation] A Study on Estimating TDoA of Sound in Reverberant Environment
Yudai Suzuki (UTokyo), Tsutomu Ikegami (AIST), Tomohiro Kudoh (UTokyo) EA2021-58
The measurement of the time difference of arrival (TDoA) of sound is improved by coupling reverberation removal filters... [more] EA2021-58
pp.7-12
SDM, ICD, ITE-IST [detail] 2021-08-17
10:15
Online Online [Invited Talk] Buried nanomagnet realizing high-speed/low-variability silicon spin qubits: implementable in error-correctable large-scale quantum computers
Shota Iizuka, Kimihiko Kato, Atsushi Yagishita, Hidehiro Asai, Tetsuya Ueda, Hiroshi Oka, Junichi Hattori, Tsutomu Ikegami, Koichi Fukuda, Takahiro Mori (AIST) SDM2021-30 ICD2021-1
We propose a buried nanomagnet (BNM) realizing high-speed/low-variability silicon spin qubit operation, inspired by buri... [more] SDM2021-30 ICD2021-1
pp.1-6
CPSY, RECONF, VLD, IPSJ-ARC, IPSJ-SLDM [detail] 2021-01-26
10:55
Online Online Network Intrusion Detection System based on Hybrid FPGA/GPU Pattern Matching
Shunta Kikuchi (AIST/The Univ. of Tokyo), Tsutomu Ikegami, Akram ben Ahmed (AIST), Tomohiro Kudoh (The Univ. of Tokyo/AIST), Ryohei Kobayashi, Norihisa Fujita, Taisuke Boku (Univ. of Tsukuba) VLD2020-59 CPSY2020-42 RECONF2020-78
These days, Heterogeneous computing is becoming common. In this study, we made an NIDS (Network Intrusion Detection Syst... [more] VLD2020-59 CPSY2020-42 RECONF2020-78
pp.113-118
NC, NLP
(Joint)
2021-01-21
11:40
Online Online Optimization of LQ-Nets quantization using genetic algorithm
Kazuki Tominaga (UTokyo/AIST), Tsutomu Ikegami (AIST), Pan Hongyi (AIST/UTokyo), Tomohiro Kudoh (UTokyo/AIST) NC2020-33
(To be available after the conference date) [more] NC2020-33
pp.7-12
SDM 2020-11-20
16:40
Online Online [Invited Talk] TCAD simulation for atomic layer channel Tunnel FETs based on ab-initio band calculation
Hiderhiro Asai (AIST), Tatsuya Kuroda (Osaka Univ.), Koichi Fukuda, Junichi Attori, Tsutomu Ikegami (AIST), Nobuya Mori (Osaka Univ.) SDM2020-34
 [more] SDM2020-34
pp.58-62
MBE, NC, NLP, CAS
(Joint) [detail]
2020-10-30
11:15
Online Online Accuracy Improvement of Deep Metric Learning by using Dynamic Scaling Parameter in Softmax Function
Keiju Sato (UTokyo), Tsutomu Ikegami (AIST), Keisuke Fujimoto (ABEJA), Tomohiro Kudoh (UTokyo) NC2020-19
(To be available after the conference date) [more] NC2020-19
pp.56-61
SDM 2019-11-08
09:30
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] Device Simulation of Dynamic Behavior of Ferroelectric Field-Effect Transistors
Junichi Hattori, Tsutomu Ikegami, Koichi Fukuda, Hiroyuki Ota, Shinji Migita, Hidehiro Asai (AIST) SDM2019-74
We propose a method to simulate the dynamic behavior of field-effect transistors (FETs) having ferroelectric materials i... [more] SDM2019-74
pp.27-32
SDM 2019-01-29
09:30
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] Multidomain Dynamics of Ferroelectric Polarization in Negative Capacitance State and its Impacts on Performances of Field-Effect Transistors
Hiroyuki Ota, Tsutomu Ikegami, Koichi Fukuda, Junichi HattoriI, Hidehiro Asai, Kazuhiko Endo, Shinji Migita (AIST), Akira Toriumi (The Univ. of Tokyo) SDM2018-81
In this paper, we clarified the multidomain dynamics of ferroelectric polarization in the Negative Capacitance Field-Eff... [more] SDM2018-81
pp.1-4
SDM 2018-11-09
14:20
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] Device Simulation of Field-Effect Transistor Using Ferroelectric Negative Capacitance
Junichi Hattori, Tsutomu Ikegami, Koichi Fukuda, Hiroyuki Ota, Shinji Migita, Hidehiro Asai (AIST) SDM2018-74
We consider the method to simulate negative-capacitance field-effect transistors (NC FETs) harnessing negative capacitan... [more] SDM2018-74
pp.47-52
CPSY, DC, IPSJ-ARC
(Joint) [detail]
2018-07-31
11:45
Kumamoto Kumamoto City International Center Quantization Optimization for Training of Generative Adversarial Network
Yuma Kishi (UT/AIST), Tsutomu Ikegami, Shinichi Ouchi, Ryosei Takano (AIST), Wakana Nogami, Tomohiro Kudoh (UT/AIST) CPSY2018-19
(To be available after the conference date) [more] CPSY2018-19
pp.91-96
CPSY, DC, IPSJ-ARC
(Joint) [detail]
2018-08-01
15:15
Kumamoto Kumamoto City International Center Optimization of Numerical Expression in CNN using Genetic Algorithm
Wakana Nogami (Tokyo Univ./AIST), Tsutomu Ikegami, Shin-ichi O'uchi, Ryosei Takano (AIST), Yuma Kishi, Tomohiro Kudoh (Tokyo Univ./AIST) CPSY2018-26
The accuracy of image recognition by the convolutional neural network (CNN) has been improving year by year, and the mod... [more] CPSY2018-26
pp.193-198
SDM 2018-01-30
11:00
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] Perspective of Negative Capacitance FinFETs Investigated by Transient TCAD Simulation
Hiroyuki Ota, Shinji Mgita, Tsutomu Ikegami, Junichi Hattori, Hidehiro Asai, Koichi Fukuda (AIST), Akira Toriumi (The Univ. of Tokyo) SDM2017-91
 [more] SDM2017-91
pp.1-4
CPSY, DC, IPSJ-ARC
(Joint) [detail]
2017-07-26
09:30
Akita Akita Atorion-Building (Akita) Flow in Cloud: A dataflow centric cloud system of heterogeneous engines
Tomohiro Kudoh (Univ. of Tokyo), Ryousei Takano (AIST), Hideharu Amano (Keio Univ.), Michihiro Koibuchi (NII), Hiroki Matsutani (Keio Univ), Toshihiro Hanawa (Univ. of Tokyo), Tsutomu Ikegami, Kuniyasu Suzaki, Akira Tanaka (AIST), Erio Akanuma (AIST/Univ of Tokyo), Shu Namiki (AIST), Kenjiro Taura (Univ. of Tokyo) CPSY2017-16
 [more] CPSY2017-16
pp.1-5
SDM 2017-01-30
11:30
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] Fully Coupled 3-D Device Simulation of Negative Capacitance FinFETs for Sub 10 nm Integration
Hiroyuki Ota, Tsutomu Ikegami, Junichi Hattori, Koichi Fukuda, Shinji Migita (AIST), Akira Toriumi (The Univ. of Tokyo) SDM2016-133
Subthreshold operation of negative capacitance FinFETs (NC-FinFETs) at sub 10 nm gate length are analyzed with a newly d... [more] SDM2016-133
pp.13-16
 Results 1 - 15 of 15  /   
Choose a download format for default settings. [NEW !!]
Text format pLaTeX format CSV format BibTeX format
Copyright and reproduction : All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)


[Return to Top Page]

[Return to IEICE Web Page]


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan