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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 15 of 15  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
ICD, CPSY, CAS 2018-12-23
09:30
Okinawa   [Poster Presentation] Evaluation of performance of 5GHz PLL with high-frequency injection pulses
Yuuki Kojima, Takao Kihara, Tsutomu Yoshimura (OIT) CAS2018-97 ICD2018-81 CPSY2018-63
Recent years, The high-frequency and the low-jitter clock generation is required due to speeding up of the communication... [more] CAS2018-97 ICD2018-81 CPSY2018-63
pp.81-82
ICD, CPSY, CAS 2018-12-23
09:30
Okinawa   [Poster Presentation] Evaluation of jitter performance with external- and self-injection in PLL circuit
Tatsuya Okafuji, Kazuki Miyao, Takao Kihara, Tsutomu Yoshimura (OIT) CAS2018-100 ICD2018-84 CPSY2018-66
In recent years, high-speed clock with high precision is required as communication speed increases. We have confirmed th... [more] CAS2018-100 ICD2018-84 CPSY2018-66
pp.91-93
ICD, CPSY, CAS 2018-12-23
09:30
Okinawa   [Poster Presentation] Efficiency Improvement for Power Amplifiers in RF Transceivers with Shared On-Chip Balun
Toshiki Murata, Takao Kihara, Tsutomu Yoshimura (OIT) CAS2018-104 ICD2018-88 CPSY2018-70
 [more] CAS2018-104 ICD2018-88 CPSY2018-70
pp.103-104
ICD, CPSY, CAS 2018-12-23
09:30
Okinawa   [Poster Presentation] FPGA Implementation of Digital Transmitters with RF Pulse-width Modulation
Kazuto Yoshida, Takao Kihara, Tsutomu Yoshimura (OIT) CAS2018-105 ICD2018-89 CPSY2018-71
Common RF transmitters consist of high-cost analog circuits and linear power amplifiers (PA) consuming much power. We ca... [more] CAS2018-105 ICD2018-89 CPSY2018-71
pp.105-106
ICD, CPSY, CAS 2018-12-23
09:30
Okinawa   [Poster Presentation] Digital Reduction of Third-Order Distortions in Time-Interleaved A/D Converters
Keisuke Miyakoshi, Takao Kihara, Tsutomu Yoshimura (OIT) CAS2018-106 ICD2018-90 CPSY2018-72
Harmonic distortions appear at the output of an A/D converter (ADC) due to its nonlinearity, degrading the spurious-free... [more] CAS2018-106 ICD2018-90 CPSY2018-72
pp.107-108
EE, IEE-SPC, IEE-EDD
(Joint)
2017-11-21
08:55
Kagoshima Kagoshima Univ. Low-Input-voltage and high-efficiency boost converter employing charge pump for energy harvesting
Satoshi Hashimoto, Tsutomu Yoshimura, Takao Kihara (Osaka Inst. of Tech.) EE2017-36
Recently, the energy harvesting such as the electromagnetic wave energy and the thermoelectric power generation is getti... [more] EE2017-36
pp.7-12
ICD, CPSY 2016-12-15
15:30
Tokyo Tokyo Institute of Technology [Poster Presentation] Design of injection-locked PLL with low-frequency reference clock
Yuuya Masui, Naohiro Fujii, Mayu Kobayashi, Satosi hashimoto, Tsutomu Yoshimura, Takao kihara (OIT) ICD2016-75 CPSY2016-81
 [more] ICD2016-75 CPSY2016-81
pp.69-74
EE 2016-11-28
13:30
Tokyo Kikai-Shinko-Kaikan Bldg. [Poster Presentation] Study of Ultra-low voltage oscillator for Energy Harvesting
Satoshi Hashimoto, Tsutomu Yoshimura, Takao Kihara, Hiroshi Makino, Shuhei Iwade (Osaka Tech), Yoshio Matsuda (Kanazawa Univ.) EE2016-35
Recently, the energy harvesting such as the power generation with the electromagnetic wave energy and the thermoelectric... [more] EE2016-35
pp.29-33
ICD, CPSY 2014-12-01
15:15
Tokyo Kikai-Shinko-Kaikan Bldg. [Poster Presentation] Analysis of linear model with external interference noise in oscillators.
Koichiro Hida, Shinji Shimizu, Shuei Morishita, Takao Kihara, Tsutomu Yoshimura (OIT) ICD2014-94 CPSY2014-106
The influence of the external interference noise on oscillators is analyzed employing the concept of injection-locked ph... [more] ICD2014-94 CPSY2014-106
pp.67-72
ICD 2012-12-17
15:55
Tokyo Tokyo Tech Front [Poster Presentation] A New Approach of the Analysis of the ISF in Oscillators with a Closed-Loop Control
Junki Mizuno, Tsutomu Yoshimura, Shuhei Iwade, Hiroshi Makino (OIT), Yoshio Matsuda (Kanazawa Univ.) ICD2012-97
The derivation of the impulse sensitivity function (ISF) of oscillators are widely used for the evaluation of the phase ... [more] ICD2012-97
pp.37-40
ICD 2012-12-17
15:55
Tokyo Tokyo Tech Front [Poster Presentation] Analysis of the Pull-in Range in a CDR-PLL with the Nonlinearity of the Phase Detector
Shinji Shimizu, Tsutomu Yoshimura, Shuhei Iwade, Hiroshi Makino (OIT), Yoshio Matsuda (Kanazawa Univ.) ICD2012-100
The analysis of the lock-in process of CDR-PLLs using the nonlinear model of the phase detector is presented. The analys... [more] ICD2012-100
pp.45-48
ICD 2011-12-15
16:10
Osaka   [Poster Presentation] The design of TDC and ADPLL circuits considering metastable operations
Yasuyuki Shimizu (Osaka Inst. Tech.), Giichi Sakemi, Tsutomu Yoshimura, Shuhei Iwade, Hiroshi Makino (OIT), Yoshio Matsuda (Kanazawa Univ.) ICD2011-104
 [more] ICD2011-104
pp.25-27
ICD 2011-12-15
16:10
Osaka   [Poster Presentation] Simulation and Analysis of the Interference Noise between PLL circuits.
Ken Maruhashi, Junki Mizuno, Tsutomu Yoshimura, Shuhei Iwade, Hiroshi Makino (Osaka Inst. Tech.), Yoshio Matsuda (Kanazawa Univ.) ICD2011-110
When the multiple PLL circuits are laid out on a single IC chip, the influence of the interference between PLL circuits ... [more] ICD2011-110
pp.57-58
ICD 2010-12-16
15:10
Tokyo RCAST, Univ. of Tokyo [Poster Presentation] A Study of Pull-in Lock Simulation in CDR-PLL
Yasuyuki Shimizu (Osaka Inst. Tech.), Tsutomu Yoshimura, Shuhei Iwade, Hiroshi Makino (OIT), Yoshio Matsuda (Kanazawa Univ.) ICD2010-107
 [more] ICD2010-107
p.71
ICD 2010-12-16
15:10
Tokyo RCAST, Univ. of Tokyo [Poster Presentation] Comparison and Analysis of the Noise Sensitivity between LC-tank and Ring-type VCO
Ken Maruhashi, Tsutomu Yoshimura, Shuhei Iwade, Hiroshi Makino (Osaka Inst. Tech.), Yoshio Matsuda (Kanazawa Univ.) ICD2010-108
 [more] ICD2010-108
p.73
 Results 1 - 15 of 15  /   
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