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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| IN, NV (Joint) |
2015-07-17 10:40 |
Hokkaido | Hokkaido University | Implementation and Evaluation of Energy-aware Search Hardware Applicable to Wide and Sparse Rules Keiko Endo, Masami Nawa, Shingo Ata (Osaka City Univ.), Yuji Yano, Yasuto Kuroda (Renesas), Hisashi Iwamoto (REVSONIC), kazunari Inoue (Nara National College of Tec./Osaka Univ.), Ikuo Oka (Osaka City Univ.)  IN2015-33 |
TCAM (Ternary Content Addressable Memory) is widely used as a search hardware for high speed table lookups. However, TC... [more] |
IN2015-33 pp.61-66 |
| IN | 2014-04-18 14:15 |
Kyoto | Kyotofu-Chusho-Kigyo-Kaikan | Low-Power and High-Speed Search Engine by Multi-dimensional TCAM Architecture with Parallel Pipelined Subdivided Structure Kenzo Okuda, Masami Nawa, Shingo Ata (Osaka City Univ.), Yuji Yano, Yasuto Kuroda (Renesas), Hisashi Iwamoto (REVSONIC), kazunari Inoue (Nara National College of Tec./Osaka Univ.), Ikuo Oka (Osaka City Univ.) IN2014-7 |
TCAM (Ternary Content Addressable Memory) is widely used for high speed searching applications on networking equipment. ... [more] | IN2014-7 pp.67-72 |
| NS, IN (Joint) |
2014-03-07 14:30 |
Miyazaki | Miyazaki Seagia | Demonstration of 100 Gbps Optical Packet Switching using 16-bit Longest Prefix Matching Forwarding Engine Hiroaki Harai, Hideaki Furukawa (NICT), Yasuto Kuroda, Shoji Koyama (Renesas Electronics) NS2013-261 |
Wire-rate packet processing for 100Gbps or more speed of line and its energy saving are issues for optical packet switch... [more] | NS2013-261 pp.491-496 |
| ICD | 2013-04-12 15:55 |
Ibaraki | Advanced Industrial Science and Technology (AIST) | [Invited Lecture]
A 250MHz 18Mb Full Ternary CAM with 0.3V Match Line Sense Amplifier in 65nm CMOS Isamu Hayashi, Teruhiko Amano, Naoya Watanabe, Yuji Yano, Yasuto Kuroda, Masaya Shirata, Katsumi Dosaka, Koji Nii, Hideyuki Noda, Hiroyuki Kawai (Renesas Electronics) ICD2013-22 |
An 18Mb full ternary CAM with 0.3V match line sense amplifier (LV-MA) is designed and fabricated in 65nm bulk CMOS proce... [more] | ICD2013-22 pp.115-120 |
| NS, IN (Joint) |
2013-03-07 10:50 |
Okinawa | Okinawa Zanpamisaki Royal Hotel | Parameters to Minimize an Energy Overhead of Two Dimensional Sliced Packet Buffer Kenzo Okuda, Shingo Ata (Osaka City Univ.), Yuji Yano, Yasuto Kuroda (Renesas Electronics), Hisashi Iwamoto (Osaka City Univ.), kazunari Inoue (Nara National College of Tec./Osaka Univ.), Ikuo Oka (Osaka City Univ.) IN2012-155 |
Recently, energy consumption of routers has become a serious problem, hence power reduction is an urgent challenge. In p... [more] | IN2012-155 pp.7-12 |
| ICD | 2012-12-17 14:20 |
Tokyo | Tokyo Tech Front | A 250Msps, 0.5W eDRAM-based Search Engine applying full-route capacity dedicated FIB application Yasuto Kuroda, Yuji Yano, Hisashi Iwamoto (Renesas), Koji Yamamoto (RDC), kazunari Inoue (Nara National College of Tech./Osaka Univ.) ICD2012-91 |
[more] | ICD2012-91 pp.21-26 |
| CQ, ICM, NS (Joint) |
2012-11-16 13:10 |
Shiga | Nagahama Inst. of Bio-Science and Tech. | [Encouragement Talk]
Latency Reduction in Energy-aware Routers Using Grained Traffic Prediction Sou Koyano, Shingo Ata, Hisashi Iwamoto (Osaka City Univ.), Yuji Yano, Yasuto Kuroda (Renesas), kazunari Inoue (Nara National College of Tech./Osaka Univ.), Ikuo Oka (Osaka City Univ.) NS2012-111 |
We have proposed Sliced Router Architecture, which reduces the power consumption of routers by adjusting routers' perfor... [more] | NS2012-111 pp.41-46 |
| IN, RCS (Joint) |
2012-05-18 14:50 |
Tokyo | Kuramae-Kaikan, Tokyo Institute of Technology | Performance Evaluation on Energy Consumption of Sliced Packet Buffer with Traffic Volume and Occupancy Adaptation Kenzo Okuda, Shingo Ata (Osaka City Univ.), Yasuto Kuroda, Yuji Yano, Hisashi Iwamoto (Renesas), kazunari Inoue (Nara National College of Tec./Osaka Univ.), Ikuo Oka (Osaka City Univ.) IN2012-19 |
Recently, energy consumption of routers is becoming a problem so power reduction becomes urgent and important challenge.... [more] | IN2012-19 pp.43-48 |
| NS, IN (Joint) |
2012-03-09 14:10 |
Miyazaki | Miyazaki Seagia | A Memory Controller with Guaranteed-Bandwidth Solution Hisashi Iwamoto, Yasuto Kuroda, Yuji Yano (Renesas), Koji Yamamoto (RDC), Shingo Ata (Osaka City Univ.), kazunari Inoue (Nara National College of Tec./Osaka Univ.) NS2011-258 |
Network traffic keeps increasing like as the demand of video streaming. Routers and switches in wire-line networks requi... [more] | NS2011-258 pp.445-450 |
| NS, IN (Joint) |
2012-03-09 14:30 |
Miyazaki | Miyazaki Seagia | Advanced memory controller for Low power router architecture Yasuto Kuroda, Hisashi Iwamoto, Yuji Yano (Renesas), Shiro Otani (Hitachi Info. & Comm. Eng.), Kenzo Okuda, Shingo Ata (Osaka City Univ.), kazunari Inoue (Nara National College of Tech./Osaka Univ.), Go Hasegawa, Masayuki Murata (Osaka Univ.) NS2011-259 |
The complete network service of infrastructure is an urgent issue by means of continuous growth in network traffic. Appa... [more] | NS2011-259 pp.451-455 |
| IN, NS (Joint) |
2011-03-03 09:40 |
Okinawa | Okinawa Convention Center | A Router Architecture comprises plural components of Slice enabling Energy Consumption Reduction Hisashi Iwamoto, Kazunari Inoue (Renesas), Shingo Ata (Osaka City Univ.), Shiro Otani (Hitachi Info. & Comm. Eng.), Go Hasegawa (Osaka Univ.), Yuji Yano, Yasuto Kuroda (Renesas), Masayuki Murata (Osaka Univ.) NS2010-186 |
The complete network service of infrastructure is an urgent issue by means of continuous growth in network traffic. Appa... [more] | NS2010-186 pp.129-134 |
| NS, ICM, CQ (Joint) |
2010-11-19 13:20 |
Kyoto | Katsura Campus, Kyoto Univ. | Cost Evaluation and Parameter Optimization of the Fast Forwarding Engine using Standard Memory Kazuya Zaitsu (Osaka City Univ.), Koji Yamamoto (Renesas Design), Yasuto Kuroda, Kazunari Inoue (Renesas Electronics), Shingo Ata, Ikuo Oka (Osaka City Univ.) NS2010-101 |
Ternary content addressable memory (TCAM) is becoming very popular for designing high-throughput forwarding engines on ... [more] |
NS2010-101 pp.75-80 |
| NS | 2010-05-21 10:50 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Hardware Implementation of Fast Forwarding Engine using Standard Memory and Dedicated Circuit Kazuya Zaitsu (Osaka City Univ.), Koji Yamamoto (Renesas Des.), Yasuto Kuroda, Kazunari Inoue (Renesas Ele.), Shingo Ata, Ikuo Oka (Osaka City Univ.) NS2010-26 |
Ternary content addressable memory (TCAM) is becoming very popular for designing high-throughput forwarding engines on r... [more] | NS2010-26 pp.59-64 |
| ICD, SDM | 2009-07-16 11:25 |
Tokyo | Tokyo Institute of Technology | Low Energy Building Design in Packet Buffer Architecture with Deterministic Performance Guarantee Kazuya Zaitsu (Osaka City Univ.), Hisashi Iwamoto, Yasuto Kuroda, Yuji Yano (Renesas Technology), Koji Yamamoto (Renesas Design), Kazunari Inoue (Renesas Technology), Shingo Ata, Ikuo Oka (Osaka City Univ.) SDM2009-100 ICD2009-16 |
To design guaranteed high-performance router, it is problem that packet buffer is non-deterministic. We propose Head Buf... [more] | SDM2009-100 ICD2009-16 pp.17-22 |
| CPSY | 2007-10-25 15:10 |
Kumamoto | Kumamoto University | Acceleration of Multimedia Data Processing with CAM-Enhanced Massive-Parallel SIMD Matrix Processor Takeshi Kumaki, Masakatsu Ishizaki, Masaharu Tagami, Tetsushi Koide, Hans Juergen Mattausch (Hiroshima Univ.), Takayuki Gyohten, Hideyuki Noda, Yasuto Kuroda, Katsumi Dosaka, Kazutami Arimoto, Kazunori Saito (Renesas Technology) CPSY2007-27 |
A multimedia processor requires four capabilities, fast processing, small area size, low power consumption and programma... [more] | CPSY2007-27 pp.19-24 |
| ICD, ITE-CE | 2006-12-15 12:05 |
Hiroshima | Multiple CAM Matches and Self-adapting Codeword Table for Optimized Real-time Huffman Encoding Masakatsu Ishizaki, Takeshi Kumaki, Yutaka Kono, Masaharu Tagami, Tetsushi Koide, Hans Juergen Mattausch (Hiroshima Univ.), Yasuto Kuroda, Takayuki Gyohten, Hideyuki Noda, Katsumi Dosaka, Kazutami Arimoto, Kazunori Saito (Renesas Technology Corp.) |
[more] | ICD2006-165 pp.125-130 |
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| ICD, SIP, IE, IPSJ-SLDM | 2006-10-26 11:30 |
Miyagi | Super parallel SIMD processor with CAM based high-speed pattern matching capability Yutaka Kono, Takeshi Kumaki, Masakatsu Ishizaki, Masaharu Tagami, Tetsushi Koide, Hans Juergen Mattausch (Hiroshima Univ.), Takayuki Gyohten, Hideyuki Noda, Yasuto Kuroda, Katsumi Dosaka, Kazutami Arimoto, Kazunori Saito (Renesas) |
A super parallel SIMD processor has been developed for handling the increasing amount of multimedia data efficiently. ... [more] |
SIP2006-90 ICD2006-116 IE2006-68 pp.39-44 |
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