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Committee Date Time Place Paper Title / Authors Abstract Paper #
IT, EMM 2016-05-19
14:45		 Hokkaido Otaru Economic Center Simulation of error-correcting code using LDPC code with Sum-Product method for a single-dot pattern method
Kitahiro Kaneda (Osaka Prefecture Univ.), Yasuyuki Anezaki, Keiichi Iwamura (TUS), Isao Echizen (NII) IT2016-7 EMM2016-7		 We have proposed a single dot information hiding method for printed matter. In this paper, we try to apply LDPC error co... [more] IT2016-7 EMM2016-7
pp.37-42
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