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Committee Date Time Place Paper Title / Authors Abstract Paper #
HWS, VLD 2023-03-03
13:50		 Okinawa
(Primary: On-site, Secondary: Online)		 A Logic Locking Method based on Function Modification Circuit
Yohei Noguchi, Masayoshi Yoshimura (Kyoto Sangyo Univ.), Rei Miura, Toshinori Hosokawa (Nihon Univ.) VLD2022-107 HWS2022-78		 In recent years, with the increase of VLSI integration, semiconductor design companies to design a VLSI have tended to u... [more] VLD2022-107 HWS2022-78
pp.185-190
DC 2022-03-01
13:45		 Tokyo Kikai-Shinko-Kaikan Bldg.
(Primary: On-site, Secondary: Online)		 A Logic Locking Method based on SFLL-hd at Register Transfer Level
Yohei Noguchi, Masayoshi Yoshimura (Kyoto Sangyo Univ.), Atsuya Tsujikawa, Toshinori Hosokawa (Nihon Univ.) DC2021-72		 In recent years, with the increase of VLSI integration, LSI design companies utilize circuit design information, called ... [more] DC2021-72
pp.45-50
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