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Committee Date Time Place Paper Title / Authors Abstract Paper #
ICD 2018-04-20
10:20
Tokyo   [Invited Lecture] An Implementation of 2RW Dual-Port SRAM using 65 nm Silicon-on-Thin-Box (SOTB) for Smart IoT
Yohei Sawada, Yoshiki Yamamoto, Takumi Hasegawa, Hiroki Shinkawata, Makoto Yabuuchi (REL), Yoshihiro Shinozaki, Kyoji Ito (NSW), Shinji Tanaka, Nii Koji, Shiro Kamohara (REL) ICD2018-8
 [more] ICD2018-8
pp.29-32
ICD 2005-04-14
09:30
Fukuoka   Low-Power Embedded SRAM Modules with Expanded Margins for Writing
Masanao Yamaoka (Hitachi, Ltd.), Noriaki Maeda (Renesas), Yoshihiro Shinozaki (Hitachi ULSI), Yasuhisa Shimazaki, Koji Nii, Shigeru Shimada, Kazumasa Yanagisawa (Renesas), Takayuki Kawahara (Hitachi, Ltd.)
The power consumption of a low-power SoC has a battery life of mobile appliances. The general SoCs have large on-chip SR... [more] ICD2005-2
pp.7-12
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