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Committee Date Time Place Paper Title / Authors Abstract Paper #
DC 2011-02-14
16:05
Tokyo Kikai-Shinko-Kaikan Bldg. Note on Area Overhead Reduction for Reconfigurable On-Chip Debug Circui
Masayuki Arai, Yoshihiro Tabata, Kazuhiko Iwasaki (Tokyo Metro. Univ.) DC2010-69
In this study we evaluate the effectiveness of a reconfigurable on-chip debug circuit, in terms of hardware overhead and... [more] DC2010-69
pp.63-68
DC 2010-06-25
15:45
Tokyo Kikai-Shinko-Kaikan Bldg. Note on Insertion Point and Area of Observation Circuit for On-Chip Debug Technique
Masayuki Arai, Yoshihiro Tabata, Kazuhiko Iwasaki (Tokyo Metro. Univ.) DC2010-12
 [more] DC2010-12
pp.25-30
EMT, OPE, MW 2007-08-02
11:40
Hokkaido Muroran Institute of Technology Topology Optimization for Route Modification at Optical Waveguide Intersection
Yoshihiro Tabata, Koichi Hirayama, Yasuhide Tsuji, Yukinari Hayashi (Kitami Inst. of Tech.) MW2007-48 OPE2007-35
We study a design method based on topology optimization with the finite-element method. Since topology optimization can ... [more] MW2007-48 OPE2007-35
pp.37-42
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