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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 20 of 23  /  [Next]  
Committee Date Time Place Paper Title / Authors Abstract Paper #
NC, NLP 2011-01-24
13:20
Hokkaido Hokakido Univ. Stochastic Resonance in Subthreshold Logic Memory Circuit
Akira Utagawa, Kazunori Yoshida, Tetsuya Asai, Yoshihito Amemiya (Hokkaido Univ.) NLP2010-131 NC2010-95
 [more] NLP2010-131 NC2010-95
pp.37-42
NC, NLP 2011-01-24
13:45
Hokkaido Hokakido Univ. Array-enhanced stochastic resonance in a network of locally-coupled excitable neuron circuits
Gessyca Maria Tovar, Tetsuya Asai, Yoshihito Amemiya (Hokkaido Univ.) NLP2010-132 NC2010-96
 [more] NLP2010-132 NC2010-96
pp.43-48
NC 2010-10-23
14:30
Fukuoka Kyushu Inst. Tech. (Kitakyushu Sci. and Res. Park) A ReRAM-based Analog Synaptic Device exhibiting Spike-Timing-Dependent Plasticity
Nobuo Akou, Tetsuya Asai (Hokkaido Univ.), Takeshi Yanagida, Tomoji Kawai (Osaka Univ.), Yoshihito Amemiya (Hokkaido Univ.) NC2010-46
We propose a STDP synaptic device that employs a resistive RAM (ReRAM). The device is a CMOS-ReRAM-hybrid circuit that c... [more] NC2010-46
pp.23-28
ICD
(Workshop)
2010-08-16
- 2010-08-18
Overseas Ho Chi Minh City University of Technology An Offset Compensation Method Using Subthreshold CMOS Operational Amplifiers for Fully Differential Amplifiers
Tomoki Iida, Tetsuya Asai, Yoshihito Amemiya, Eiichi Sano (Hokkaido Univ.)
An offset compensation method for fully differential amplifiers is described. The method uses a feedback bias circuit co... [more]
NLP 2010-03-10
09:35
Tokyo   Stochastic Resonance in a Simple Electrical Circuits having a Double-Well Potential -- Laboratory Experiments with a Single Operational Amplifier --
Akira Utagawa, Tetsuya Asai, Kazunori Yoshida, Yoshihito Amemiya (Hokkaido Univ.) NLP2009-171
In this report we propose a double-well potential system that can easily be implemented by a single operational amplifie... [more] NLP2009-171
pp.75-80
ICD 2009-12-14
13:30
Shizuoka Shizuoka University (Hamamatsu) [Poster Presentation] A nanowatt DA converter for subthreshold CMOS LSIs
Kazuki Yamamoto, Ken Ueno, Tetsuya Asai, Yoshihito Amemiya (Hokkaido Univ.) ICD2009-88
An ultra-low power digital-to-analog (DA) converter based on the technique of pulse-width-modulated DA conversion was pr... [more] ICD2009-88
pp.59-64
ICD 2009-12-14
13:30
Shizuoka Shizuoka University (Hamamatsu) [Poster Presentation] Intermittent Pulse Generator for Ultra-Low Power LSIs
Hiromichi Matsushita, Ken Ueno, Tetsuya Asai, Yoshihito Amemiya (Hokkaido Univ.) ICD2009-89
We proposed a timer circuit for the intermittent operation of ultra-lowpower LSIs. The circuit consists of a clock oscil... [more] ICD2009-89
pp.65-70
NLP 2009-11-13
15:55
Kagoshima   A CMOS Frequency Comparator based on Jamming Avoidance Response of Eigenmannia -- A CMOS decoder circuit extracting frequency difference from amplitudes and phases of EODs --
Daichi Fujita, Tetsuya Asai, Yoshihito Amemiya (Hokkaido Univ.) NLP2009-111
In this paper, we implement a model of an electric fish, \textit{Eigenmannia}, that detects frequency differences betwee... [more] NLP2009-111
pp.165-170
NLP 2009-11-14
13:55
Kagoshima   Theoretical Analysis of Stochastic Resonance with Population Heterogeneity in a Multi-Layer Neural Network Model
Toru Sahashi, Akira Utagawa, Tetsuya Asai, Yoshihito Amemiya (Hokkaido Univ.) NLP2009-122
In [1] we examined stochastic resonance (SR) behaviors in a multilayer neural network with population heterogeneity. The... [more] NLP2009-122
pp.225-230
ICD, ITE-IST 2009-10-02
17:25
Tokyo CIC Tokyo (Tamachi) A fully-integrated clock reference generator with frequency-locked loop
Ken Ueno, Tetsuya Asai, Yoshihito Amemiya (Hokkaido Univ.) ICD2009-61
A temperature- and supply-independent clock generator has been developed using 0.35-um CMOS technology. This generator i... [more] ICD2009-61
pp.159-164
SDM, ED 2009-02-27
10:55
Hokkaido Hokkaido Univ. The fourth passive circuit element relating magnetic flux to charge
Yoshihito Amemiya, Yasuo Takahashi (Hokkaido Univ.) ED2008-236 SDM2008-228
 [more] ED2008-236 SDM2008-228
pp.69-74
ICD, ITE-IST 2008-10-22
17:05
Hokkaido Hokkaido University Process and compensation techniques for low-voltage CMOS digital circuits
Yusuke Tsugita, Ken Ueno (Hokudai Univ), Tetsuya Hirose (Koube Univ), Tetsuya Asai, Yoshihito Amemiya (Hokudai Univ) ICD2008-67
In low-voltage CMOS digital circuits, threshold voltage varaition fluctuates circuit performance significantly. In this ... [more] ICD2008-67
pp.49-54
ICD, ITE-IST 2008-10-22
17:30
Hokkaido Hokkaido University An Ultra-low Power Voltage Reference consisting of Subthreshold MOSFETs
Ken Ueno (Hokkaido Univ.), Tetsuya Hirose (Kobe Univ.), Tetsuya Asai, Yoshihito Amemiya (Hokkaido Univ.) ICD2008-68
An ultra-low power CMOS voltage reference circuit has been fabricated in
0.35-um standard CMOS process. The circuit ge... [more]
ICD2008-68
pp.55-60
SDM, ED 2008-07-09
15:30
Hokkaido Kaderu2・7 CMOS phase shift Oscillator Using the Conduction of Heat
Takaaki Hirai, Tetsuya Asai, Yoshihito Amemiya (Hokkaido univ.) ED2008-86 SDM2008-105
We propose a CMOS phase-shift oscillator that makes use of a phase shift in the conduction of heat. The oscillator consi... [more] ED2008-86 SDM2008-105
pp.249-252
SDM, ED 2008-07-10
11:40
Hokkaido Kaderu2・7 An Insect Vision-based Single-electron Circuit Performing Motion Detection
Andrew Kilinga Kikombo, Tetsuya Asai, Yoshihito Amemiya (Hokkaido univ.) ED2008-70 SDM2008-89
Nano-electronic devices are promising candidates for the next-generation of low-power LSIs and applications in parallel ... [more] ED2008-70 SDM2008-89
pp.159-164
NC 2007-11-18
13:45
Saga Saga Univ. Toward a Bio-Inspired Image Processor for Edge Extraction with Single-Electron Devices
Andrew Kilinga Kikombo (Hokkaido Univ.), Alexandre Schmid (Swiss Fed. Inst. of Tech.), Tetsuya Asai (Hokkaido Univ.), Yusuf Leblebici (Swiss Fed. Inst. of Tech.), Yoshihito Amemiya (Hokkaido Univ.) NC2007-58
Edge extraction in incident images is a primary function carried out in the vertebrate retina. Based on a biological mod... [more] NC2007-58
pp.19-24
ICD, ITE-IST 2007-07-26
08:55
Hyogo   CMOS voltage reference based on threshold voltage of a MOSFET
Ken Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya (Hokkaido Univ.) ICD2007-38
We developed a voltage reference circuit using MOSFETs operated in the subthreshold region, except for the MOS resistor ... [more] ICD2007-38
pp.5-10
SDM, ED 2007-02-01
16:40
Hokkaido   -
Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya (Hokkaido Univ.)
 [more] ED2006-247 SDM2006-235
pp.41-45
ICD, SDM 2006-08-17
11:20
Hokkaido Hokkaido University A CMOS Monitoring Sensor for Guaranteeing the Quality of Various Perishables with a Wide Range of Activation Energy
Ken Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya (Hokkaido Univ.)
 [more] SDM2006-130 ICD2006-84
pp.31-36
ICD, SDM 2006-08-17
11:45
Hokkaido Hokkaido University Critical temperature switch circuit with CMOS subthreshold region
Atsushi Hagiwara, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya (Hokkaido Univ.)
We propose a thermosensing circuit that changes its internal state abruptly at a threshold temperature. The circuit swit... [more] SDM2006-131 ICD2006-85
pp.37-42
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