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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
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Committee Date Time Place Paper Title / Authors Abstract Paper #
SS 2019-03-05
15:00
Okinawa   Quality Evaluation Asssurance Levels for Machine Learning Software
Shin Nakajima (NII), Yoshiki Seo, Yutaka Oiwa, Yoshinao Isobe (AIST) SS2018-79
 [more] SS2018-79
pp.163-168
CAS, MSS, VLD, SIP 2010-06-22
12:55
Hokkaido Kitami Institute of Technology Semi-automated Modeling of Interrupt Behavior Control with Promela
Kenji Tadano (FeliCa Networks), Yoshinao Isobe (AIST) CAS2010-24 VLD2010-34 SIP2010-45 CST2010-24
Reverse engineering using model checking techniques is effective as a method to improve embedded software quality. Howev... [more] CAS2010-24 VLD2010-34 SIP2010-45 CST2010-24
pp.133-138
CAS, MSS, VLD, SIP 2010-06-22
13:20
Hokkaido Kitami Institute of Technology An Implementation of Sequentialization and State-Reduction for Analyzing Concurrent Systems -- Towards Automatic Generation of Specifications --
Yoshinao Isobe (AIST) CAS2010-25 VLD2010-35 SIP2010-46 CST2010-25
It is difficult to understand the whole behavior of concurrent systems comparing with sequential systems. Therefore, mod... [more] CAS2010-25 VLD2010-35 SIP2010-46 CST2010-25
pp.139-144
MSS 2010-01-21
15:00
Aichi Toyota Central R&D Labs. Refinement and Verification of Sequence Diagrams Using the Process Algebra CSP
Tomohiro Kaizu (JAIST), Yoshinao Isobe (AIST), Masato Suzuki (JAIST) CST2009-40
Sequence diagrams are often used in the modular design of softwares. In this paper, we propose a method to verify correc... [more] CST2009-40
pp.19-24
MSS 2010-01-22
11:10
Aichi Toyota Central R&D Labs. Proposal of a Business Process Verification Method using Orders of Tasks
Daijiro Murata, Ryota Mibe (Hitachi), Yoshinao Isobe (AIST) CST2009-49
To verify upstream design information of an information system, we propose a method transforming partial business proces... [more] CST2009-49
pp.67-72
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