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Committee Date Time Place Paper Title / Authors Abstract Paper #
SDM 2020-10-22
13:30
Online Online A two-step wet etching process for the integration of PdEr/HfO2 gate stack structure on the gate-first Schottky barrier MOSFET
Rengie Mark D. Mailig, Yuichiro Aruga, Shun-ichiro Ohmi (Tokyo Tech) SDM2020-17
 [more] SDM2020-17
pp.16-19
SDM 2019-10-24
10:50
Miyagi Niche, Tohoku Univ. Low temperature formation of PdErSi/Si(100) for Schottky barrier source and drain MOSFET applications
Rengie Mark D. Mailig, Yuichiro Aruga, Min Gee Kim, Shun-ichiro Ohmi (Tokyo Tech) SDM2019-61
In this report, the effects of the TiN encapsulating layer on the low temperature formation of the PdErSi/Si(100) with d... [more] SDM2019-61
pp.39-43
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