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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
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Committee Date Time Place Paper Title / Authors Abstract Paper #
SR, UWT
(Joint)
2023-01-26
16:40
Tokyo Takanawa Campus, Tokai Univ.
(Primary: On-site, Secondary: Online)
Experimental study on the position-free wireless power supply system for feeding high power to AUV at actual sea.
Yoshio Koyanagi, Syuichiro Yamaguchi, Tatsuo Yagi (PSNRD), Kazuhiro Eguchi (PCO), Ryosuke Hasaba (PIS), Hiroshi Satoh (PSNRD), Tamaki Ura (DRT)
Practical application of wireless power supply, which can supply power even in seawater, is expected to extend the opera... [more]
NC, MBE
(Joint)
2011-03-07
14:35
Tokyo Tamagawa University An Algorithm Generating Subjective Contours with Curvature for Pixel-Parallel Hardware Architecture
Yuichiro Yamaguchi, Takashi Morie (Kyushu Inst. Tech.) NC2010-138
The edge information of contours in natural images captured by an image sensor is often lacked due to poor contrast with... [more] NC2010-138
pp.65-70
ICD 2007-04-12
10:00
Oita   A high-density 1T-4MTJ MRAM with Self-Reference Sensing Scheme
Yasumitsu Murai, Hiroaki Tanizaki (Renesas Design), Takaharu Tsuji, Jun Otani, Yuichiro Yamaguchi, Haruo Furuta, Shuichi Ueno, Tsukasa Oishi, Masanori Hayashikoshi, Hideto Hidaka (Renesas) ICD2007-3
A high-density memory cell named 1-Transistor 4-Magnetic Tunnel Junction (1T-4MTJ) has been proposed for Magnetic Random... [more] ICD2007-3
pp.13-16
ICD 2005-04-15
10:30
Fukuoka   A 1.2V 1Mbit Embedded MRAM Core with Folded Bit-Line Array Architecture
Takaharu Tsuji (Renesas Technorogy), Hiroaki Tanizaki (Renesas Device Design), Masatoshi Ishikawa, Jun Otani, Yuichiro Yamaguchi, Shuichi Ueno, Tsukasa Oishi, Hideto Hidaka (Renesas Technorogy)
A 1Mbit MRAM with a 0.81um2 1-Transistor 1-Magnetic Tunnel Junction (1T-1MTJ) cell using 0.13um 4LM logic technology has... [more] ICD2005-13
pp.1-6
 Results 1 - 4 of 4  /   
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