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Committee Date Time Place Paper Title / Authors Abstract Paper #
CPSY 2007-10-26
09:00		 Kumamoto Kumamoto University An examination of hardware acceleration in FPGA placement based on SA
Yoshio Sonokawa, Yuji Ariuchi, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.) CPSY2007-30		 Placement is one of the steps that expend the time in the FPGA (Field Programmable Gate Array) design automation flow.
... [more]		 CPSY2007-30
pp.33-38
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