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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 7 of 7  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
SCE 2024-08-09
10:30
Tokyo Kikai-Shinko-Kaikan Bldg. (Tokyo, Online)
(Primary: On-site, Secondary: Online)
Design of Single Flux Quantum circuit with ReLU function output characteristics for neurons with superconducting devices
Yuto Ueno, Yuki Hironaka, Nobuyuki Yoshikawa, Yuki Yamanashi (YNU) SCE2024-2
To design a circuit dedicated to artificial intelligence using single flux quantum circuits to reduce the training time ... [more] SCE2024-2
pp.6-10
SCE 2021-01-19
13:05
Online Online (Online) [Invited Talk] Design of serializer/deserializer circuits for adiabatic quantum-flux-parametron circuits using delay-line clocking
Yuki Hironaka, Taiki Yamae, Naoki Takeuchi, Nobuyuki Yoshikawa (Yokohama Natl. Univ.) SCE2020-17
An adiabatic quantum-flux-parametron (AQFP) circuit is an extremely low-power Josephson logic family. A novel clocking s... [more] SCE2020-17
pp.1-6
SCE 2020-11-25
14:20
Online Online (Online) Design and bit-error-late evaluation of a Josephson latching driver using 10-kA/cm2 Nb process
Yuki Hironaka, Nobuyuki Yoshikawa (Yokohama Natl. Univ.) SCE2020-8
We have been developing Josephson-CMOS hybrid memory, which is a combination of CMOS memory and Josephson logic circuits... [more] SCE2020-8
pp.1-6
SCE 2020-01-17
13:15
Kanagawa (Kanagawa) [Poster Presentation] Optimization of a Josephson latching driver using 10-kA/cm2 Nb process for a Josephson-CMOS hybrid memory
Yuki Hironaka, Yuki Yamanashi, Nobuyuki Yoshikawa (Yokohama Natl. Univ.) SCE2019-47
Josephson digital circuits such as single flux quantum circuits have a great potential for future high-end computing sys... [more] SCE2019-47
pp.73-74
SCE 2020-01-17
13:15
Kanagawa (Kanagawa) [Poster Presentation] Study of low power consumption of adiabatic pass transistor decoder for Josephson-CMOS Hybrid Memories
Yu Okamoto, Yuki Hironaka, Nobuyuki Yoshikawa (Yokohama Natl. Univ.) SCE2019-49
In recent years, superconducting circuits have attracted attention because of the limitation of CMOS circuit technology.... [more] SCE2019-49
pp.79-81
SCE 2019-04-19
09:55
Tokyo (Tokyo) Demonstration of an SFQ/CMOS hybrid memory system using a one-instruction-set SFQ microprocessor
Yuki Hironaka, Yuki Yamanashi, Nobuyuki Yoshikawa (Yokohama National Univ.) SCE2019-2
SFQ/CMOS hybrid system, which is a hybridized system of SFQ circuits and CMOS memories, has been proposed as a large-sca... [more] SCE2019-2
pp.7-11
NC, MBE
(Joint)
2009-03-11
15:10
Tokyo Tamagawa Univ. (Tokyo) Development of microdialysis probe with multichannel neural electrodes
Yasuhiro X Kato (NTT CS Labs,NTT Corp.), Tomoko Tanaka (ERATO Shimojo Project), Makio Kashino (NTT CS Labs,NTT Corp./ERATO Shimojo Project), Naoyuki Hironaka (ERATO Shimojo Project) NC2008-110
This paper reports a fabricated microdialysis probe with multichannel neural electrodes for simultaneously recording bot... [more] NC2008-110
pp.43-44
 Results 1 - 7 of 7  /   
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