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Committee Date Time Place Paper Title / Authors Abstract Paper #
ICD, SDM 2014-08-04
15:45
Hokkaido Hokkaido Univ., Multimedia Education Bldg. [Invited Talk] A 32-bit CPU with Zero Standby Power and 1.5-clock Backup/2.5-clock Restore Achieved by Utilizing a 180-nm Crystalline Oxide Semiconductor Transistor
Jun Koyama, Atsuo Isobe, Hikaru Tamura, Kiyoshi Kato, Takuro Ohmaru, Wataru Uesugi, Takahiko Ishizu, Kazuaki Ohshima, Yasutaka Suzuki, Naoaki Tsutsui, Tomoaki Atsumi, Yutaka Shionoiri, Yukio Maehashi (SEL), Masahiro Fujita (Univ. of Tokyo), Shunpei Yamazaki (SEL) SDM2014-70 ICD2014-39
A flip-flop achieving high-speed backup utilizing a Si transistor and long-term retention with zero standby power by mea... [more] SDM2014-70 ICD2014-39
pp.45-50
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