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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 19 of 19  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
VLD, HWS, ICD 2024-03-02
11:15
Okinawa
(Primary: On-site, Secondary: Online)
Composable Security in High Level Synthesis for Cipher Circuit Implementation
Mingyu Yang, Gento Hiruma (Titech), Kazuo Sakiyama, Yang Li (UEC), Yuko Hara-Azumi (Titech) VLD2023-138 HWS2023-98 ICD2023-127
 [more] VLD2023-138 HWS2023-98 ICD2023-127
pp.204-208
OCS, CS
(Joint)
2024-01-12
13:05
Kagoshima   Implementation of Deep Joint Source-Channel Coding on 5G System
Keigo Matsumoto, Tomoka Mori, Yoshiaki Inoue (Osaka Univ.), Yuko Hara-Azumi (Tokyo Tech.), Kazuki Maruta (TUS), Yu Nakayama (TUAT), Yoshinori Shinohara, Hiroki Ikeda (Abit corp.), Daisuke Hisano (Osaka Univ.) CS2023-101
(Advance abstract in Japanese is available) [more] CS2023-101
pp.35-38
CS 2023-07-28
14:10
Tokyo Hachijo-machi Chamber of Commerce and Industry Impact of Learning Models on Deep Joint Source Channel Coding Adaptable to 5G Systems
Ryunosuke Yamamoto, Keigo Matsumoto, Yoshiaki Inoue (Osaka Univ.), Yuko Hara-Azumi (Tokyo Tech), Kazuki Maruta (TUS), Yu Nakayama (TUAT), Daisuke Hisano (Osaka Univ.) CS2023-56
With the development of 5G technology and the proliferation of IoT devices, Deep Joint Source-Channel Coding (Deep JSCC)... [more] CS2023-56
pp.151-156
SeMI, IPSJ-ITS, IPSJ-MBL, IPSJ-DPS 2023-05-18
17:20
Okinawa Okinawa Institute of Science and Technology (OIST)
(Primary: On-site, Secondary: Online)
A heuristic method for optimization of model transfer route in decentralized federated learning
Kota Maejima, Takayuki Nishio, Asato Yamazaki, Yuko Hara-Azumi (Tokyo Tech) SeMI2023-5
Decentralized FL (Decentralized Federated Learning) is a machine learning technique in which clients construct a model c... [more] SeMI2023-5
pp.20-22
MIKA
(3rd)
2022-10-13
11:10
Niigata Niigata Citizens Plaza
(Primary: On-site, Secondary: Online)
[Poster Presentation] Impact of Quantization Noise on CNN-based Joint Source-Channel Coding and Modulation
Keigo Matsumoto, Yoshiaki Inoue (Osaka Univ.), Kazuki Maruta, Yuko Hara-Azumi (Tokyo Institute of Tech.), Yu Nakayama (Univ. of Agri. and Tech.), Daisuke Hisano (Osaka Univ.)
 [more]
VLD, HWS [detail] 2022-03-07
16:20
Online Online AmoebaSAT-based Efficient Accelerator for Autonomous Driving Application
Yusuke Inuma, Yuko Hara-Azumi (Tokyo Tech) VLD2021-90 HWS2021-67
(To be available after the conference date) [more] VLD2021-90 HWS2021-67
pp.75-80
SeMI 2022-01-20
14:00
Nagano
(Primary: On-site, Secondary: Online)
[Short Paper] Node Relocation Algorithm for Aquatic Fronthaul in 6G Mobile Communications
Ayano Higuchi, Erina Takeshita (Tokyo Univ. of Agriculture and Tech.), Daisuke Hisano, Yoshiaki Inoue (Osaka Univ.), Kazuki Maruta, Yuko Hara-Azumi (Tokyo Institute of Tech.), Yu Nakayama (Tokyo Univ. of Agriculture and Tech.) SeMI2021-55
Underwater-terrestrial communication is one of the significant challenges for the beyond 5G mobile communications. This ... [more] SeMI2021-55
pp.16-18
ISEC 2021-05-19
15:30
Online Online [Invited Talk] Simple Electromagnetic Analysis Against Activation Functions of Deep Neural Networks (from AIHWS 2020)
Go Takatoi, Takeshi Sugawara, Kazuo Sakiyama (UEC), Yuko Hara-Azumi (Tokyo Tech), Yang Li (UEC) ISEC2021-9
This invited abstract is based on the papers [1] and [2]. There are physical attacks such as side-channel attacks that a... [more] ISEC2021-9
p.34
HWS, VLD 2019-03-01
13:30
Okinawa Okinawa Ken Seinen Kaikan Energy-Efficient, Small-Scale Multicore Processor towards IoT Edge Computing
Sayuri Onagi, Kaoru Saso, Yuko Hara-Azumi (Tokyo Tech.) VLD2018-128 HWS2018-91
(To be available after the conference date) [more] VLD2018-128 HWS2018-91
pp.211-216
HWS, VLD 2019-03-01
13:55
Okinawa Okinawa Ken Seinen Kaikan Embedded Systems Designs Using Approximate Computing for Data Clustering Acceleartion
Shun Kimijima, Fransiscus Marcel Satria, Yuko Hara-Azumi (Tokyo Tech.) VLD2018-129 HWS2018-92
(To be available after the conference date) [more] VLD2018-129 HWS2018-92
pp.217-222
VLD, HWS
(Joint)
2018-02-28
11:25
Okinawa Okinawa Seinen Kaikan Amoeba-inspired SAT Solvers on FPGA through High Level Synthesis
Hoang Ngoc Anh Nguyen (Tokyo Tech), Masashi Aono (Keio Univ.), Yuko Hara-Azumi (Tokyo Tech) VLD2017-93
 [more] VLD2017-93
pp.25-30
VLD, HWS
(Joint)
2018-02-28
11:50
Okinawa Okinawa Seinen Kaikan Systematic Analysis Framework of Variables Significance towards Approximate Computing
Sara Ayman Metwalli, Yuko Hara-Azumi (Tokyo Tech) VLD2017-94
 [more] VLD2017-94
pp.31-36
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2015-12-02
13:45
Nagasaki Nagasaki Kinro Fukushi Kaikan [Invited Talk] Towards Getting Your Paper Accepted at International Conferences -- Based on Experiences of Studying Abroad and Serving as a Program Committee Member --
Yuko Hara-Azumi (Tokyo Tech) VLD2015-48 DC2015-44
 [more] VLD2015-48 DC2015-44
p.69
MSS, CAS, SIP, VLD 2015-06-17
10:45
Hokkaido Otaru University of Commerce Extension of One-Instruction-Set Computer and Its Evaluation
Noriaki Sakamoto, Tanvir Ahmed (Tokyo Tech), Jason H. Anderson (Univ. of Toronto), Yuko Hara-Azumi (Tokyo Tech) CAS2015-4 VLD2015-11 SIP2015-35 MSS2015-4
Subleq computer is one of the best-known Turing-Complete One-Instruction-Set Computers. Subleq instruction is a three-op... [more] CAS2015-4 VLD2015-11 SIP2015-35 MSS2015-4
pp.19-24
VLD 2015-03-04
13:50
Okinawa Okinawa Seinen Kaikan Implementation and evaluation of architecture using lookup table for approximate computing
Shoichiro Sugiyama, tanvir ahmed, Yuko Hara-Azumi (Titech) VLD2014-183
Various techniques have been proposed for improving the computation performance so far, where correct computations have ... [more] VLD2014-183
pp.171-176
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2013-11-27
14:05
Kagoshima   A Heuristic Design Method for Yield Improvement based on PPCs
Shunichi Sanae, Yuko Hara-Azumi (NAIST), Shigeru Yamashita (Ritsumeikan Univ.), Yasuhiko Nakashima (NAIST) VLD2013-65 DC2013-31
A PPC (Partially-Programmable Circuit) is a novel circuit model, which replaces some logic gates with LUTs (Look Up Tabl... [more] VLD2013-65 DC2013-31
pp.27-32
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2013-11-29
11:15
Kagoshima   Estimation for Method of Controller Implementation in High-Level Synthesis
Ryoya Sobue (Ritsumeikan Univ.), Yuko Hara-Azumi (NAIST), Ittetsu Taniguchi, Hiroyuki Tomiyama (Ritsumeikan Univ.) VLD2013-96 DC2013-62
 [more] VLD2013-96 DC2013-62
pp.257-262
DC, CPSY
(Joint)
2013-08-02
18:30
Fukuoka Kitakyushu-Kokusai-Kaigijyo A Method of Replacing Equivalent Instruction Sequence for Avioding Permanent Errors
Masaya Kunimoto, Yuko Hara-Azumi, Yasuhiko Nakashima (NAIST) CPSY2013-30
(To be available after the conference date) [more] CPSY2013-30
pp.121-126
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2012-11-27
11:20
Fukuoka Centennial Hall Kyushu University School of Medicine Controller Synthesis for Clock Improvement in Behavioral Synthesis
Ryoya Sobue (Ritsumeikan Univ.), Yuko Hara-Azumi (NAIST), Takuji Hieda, Ittetsu Taniguchi, Hiroyuki Tomiyama (Ritsumeikan Univ.) VLD2012-78 DC2012-44
 [more] VLD2012-78 DC2012-44
pp.111-116
 Results 1 - 19 of 19  /   
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