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All Technical Committee Conferences (Searched in: All Years)
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Search Results: Conference Papers |
Conference Papers (Available on Advance Programs) (Sort by: Date Descending) |
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Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
IPSJ-SLDM, CPSY, RECONF, VLD [detail] |
2014-01-28 16:30 |
Kanagawa |
Hiyoshi Campus, Keio University |
A 3D FPGA-Array "Vocalise" and its communication system. Yusuke Atsumari, Jiang Li, Hiromasa Kubo, Akihiro Sorimachi, Baku Ogasawara, Masatoshi Sekine (TUAT) VLD2013-115 CPSY2013-86 RECONF2013-69 |
We have developed a 10cm square card with a three-dimensional I/O that installed a 4 million system gate scale FPGA and ... [more] |
VLD2013-115 CPSY2013-86 RECONF2013-69 pp.79-84 |
IPSJ-SLDM, CPSY, RECONF, VLD [detail] |
2014-01-28 16:55 |
Kanagawa |
Hiyoshi Campus, Keio University |
An Image Recognition System with Multi-Resolutional Feature Learning on the 3D FPGA-Array "Vocalise" Baku Ogasawara, Satoru Yokota, Jiang Li, Yusuke Atsumari, Hiromasa Kubo, Masatoshi Sekine (TUAT) VLD2013-116 CPSY2013-87 RECONF2013-70 |
We propose and develop "an image recognition system" with multi-resolutional feature learning function. The feature lear... [more] |
VLD2013-116 CPSY2013-87 RECONF2013-70 pp.85-90 |
RECONF |
2013-09-19 13:00 |
Ishikawa |
Japan Advanced Institute of Science and Technology |
The Circuit Configuration method of 3D FPGA-Array System "Vocalise" Hiromasa Kubo, Jiang Li, Yusuke Atsumari, Baku Ogasawara, Masatoshi Sekine (Tokyo Univ. of Agliculture and Tech.) RECONF2013-32 |
We have been developing the 3D FPGA-Array HPC system named as“Vocalise(Virtual Object by Configurable Array of Little Sc... [more] |
RECONF2013-32 pp.73-78 |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2012-11-28 13:25 |
Fukuoka |
Centennial Hall Kyushu University School of Medicine |
A 3D FPGA-Array HPC System "Vocalise" and its Performance Evaluation Yusuke Atsumari, Jiang Li, Hiromasa Kubo, Hakaru Tamukoh, Masatoshi Sekine (TUAT) VLD2012-94 DC2012-60 |
We have developed a 10cm square card with a three-dimensional I/O that installed a 4 million system gate scale FPGA and ... [more] |
VLD2012-94 DC2012-60 pp.201-206 |
VLD, CPSY, RECONF, IPSJ-SLDM [detail] |
2012-01-26 14:20 |
Kanagawa |
Hiyoshi Campus, Keio University |
Implementation of Numerical Circuit on 3D FPGA-Array Kenichi Takahashi, Jiang Li, Yusuke Atsumari, Shunsuke Shimazaki, Hakaru Tamukoh, Masatoshi Sekine (TUAT) VLD2011-115 CPSY2011-78 RECONF2011-74 |
In recent years, High Performance Computing (HPC) is increasingly used in various fields. HPC systems require both the f... [more] |
VLD2011-115 CPSY2011-78 RECONF2011-74 pp.141-146 |
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