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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 8 of 8  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
IN, NS
(Joint)
2019-03-05
11:30
Okinawa Okinawa Convention Center Network Function Chaining Infrastructure considering cooperation between user space and kernel space
Daisuke Settai, Takao Kondo (Keio Univ.), Zhang Liang, Yusuke Matsushita (Softbank), Fumio Teraoka (Keio Univ.) NS2018-244
Implementation of Network Functions (NF) as software realizes a flexible network, but there is overhead of memory copyin... [more] NS2018-244
pp.301-306
CPSY 2018-11-27
15:30
Gifu Hida Area Local Industry Promotion Center [Technology Exhibit] Low Power Stream Processing on a Variable Pipelined Accelerator CCSOTB2
Takuya Kojima, Naoki Ando, Yusuke Matsushita, Hayate Okuhara, Ng. Doan Anh Vu, Hideharu Amano (Keio Univ.) CPSY2018-33
 [more] CPSY2018-33
pp.1-5
RECONF 2018-09-18
14:10
Fukuoka LINE Fukuoka Cafe Space
Takuya Kojima, Naoki Ando, Yusuke Matsushita, Hayate Okuhara, Nguyen Anh Vu Doan, Hideharu Amano (Keio Univ.) RECONF2018-31
 [more] RECONF2018-31
pp.67-72
VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC
(Joint) [detail]
2017-11-06
15:20
Kumamoto Kumamoto-Kenminkouryukan Parea A shared memory chip for twin-tower of chips
Sayaka Terashima, Takuya Kojima, Hayate Okuhara, Yusuke Matsushita, Naoki Ando (Keio Univ.), Mitaro Namiki (Tokyo Univ. of Agriculture and Tech.), Hideharu Amano (Keio Univ.) VLD2017-34 DC2017-40
A shared memory chip for the building-block computing system using ThruChip Interface (TCI) is developed and evaluated.T... [more] VLD2017-34 DC2017-40
pp.43-48
CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] 2017-03-09
16:10
Okinawa Kumejima Island Power Reduction for Pipelined CGRA with the Controlling Variable Pipeline and the Body Bias Voltage
Takuya Kojima, Naoki Ando, Yusuke Matsushita, Hayate Okuhara, Hideharu Amano (Keio Univ.) CPSY2016-140 DC2016-86
(To be available after the conference date) [more] CPSY2016-140 DC2016-86
pp.51-56
ICD, CPSY 2016-12-15
10:30
Tokyo Tokyo Institute of Technology An Interectual Property for Wireless Inductive Coupling Through Chip Interface
Yusuke Matsushita, Koichiro Masuyama, Akio Nomura, Junichiro Kadomoto, Tsunaaki Shidei, Tadahiro Kuroda, Hideharu Amano (Keio Univ.) ICD2016-52 CPSY2016-58
 [more] ICD2016-52 CPSY2016-58
pp.7-12
VLD, DC, CPSY, RECONF, CPM, ICD, IE
(Joint) [detail]
2016-11-29
09:25
Osaka Ritsumeikan University, Osaka Ibaraki Campus Ultra Low Power Reconfigurable Accelerator CC-SOTB2
Koichiro Masuyama, Naoki Ando, Yusuke Matsushita, Hayate Okuhara, Hideharu Amano (Keio Univ.) VLD2016-54 DC2016-48
Cool mega array (CMA) is a low power coarse-grained reconfigurable accelerator developed using silicon on thin BOX (SOTB... [more] VLD2016-54 DC2016-48
pp.61-66
VLD, CPSY, RECONF, IPSJ-SLDM, IPSJ-ARC [detail] 2016-01-21
10:30
Kanagawa Hiyoshi Campus, Keio University Power Optimization of a Reconfigurable Accelerator by Middle-grained Body Bias Control
Yusuke Matsushita, Hayate Okuhara, Koichiro Masuyama, Yu Fujita, Hideharu Amano (Keio Univ.) VLD2015-101 CPSY2015-133 RECONF2015-83
(To be available after the conference date) [more] VLD2015-101 CPSY2015-133 RECONF2015-83
pp.185-190
 Results 1 - 8 of 8  /   
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