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All Technical Committee Conferences (Searched in: All Years)
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Search Results: Conference Papers |
Conference Papers (Available on Advance Programs) (Sort by: Date Descending) |
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Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
HWS, VLD |
2023-03-03 11:25 |
Okinawa |
(Primary: On-site, Secondary: Online) |
Identification of Redundant Flip-Flops Using Fault Injection for Low-Power Approximate Computing Circuits Jiaxuan Lu, Yutaka Masuda, Tohru Ishihara (Nagoya Univ.) VLD2022-104 HWS2022-75 |
(To be available after the conference date) [more] |
VLD2022-104 HWS2022-75 pp.167-172 |
VLD, HWS [detail] |
2022-03-07 13:15 |
Online |
Online |
[Memorial Lecture]
An Accuracy Reconfigurable Vector Accelerator based on Approximate Logarithmic Multipliers Lingxiao Hou, Yutaka Masuda, Tohru Ishihara (Nagoya Univ.) VLD2021-83 HWS2021-60 |
The logarithmic approximate multiplier proposed by Mitchell provides an efficient alternative to accurate multipliers in... [more] |
VLD2021-83 HWS2021-60 p.43 |
HWS, VLD [detail] |
2021-03-03 13:25 |
Online |
Online |
[Memorial Lecture]
Mode-wise Voltage-scalable Design with Activation-aware Slack Assignment for Energy Minimization TaiYu Cheng (Osaka Univ.), Yutaka Masuda (Nagoya Univ.), Jun Nagayama, Yoichi Momiyama (Socionext Inc.), Jun Chen, Masanori Hashimoto (Osaka Univ.) VLD2020-72 HWS2020-47 |
This paper proposes a design optimization methodology that can achieve a mode-wise voltage scalable (MWVS) design with a... [more] |
VLD2020-72 HWS2020-47 p.30 |
HWS, VLD [detail] |
2020-03-05 11:20 |
Okinawa |
Okinawa Ken Seinen Kaikan (Cancelled but technical report was issued) |
stochasitc fast estimation of timing error induced circuit lifetime distribution Hazuki Tomiyama, Yutaka Masuda, Tohru Ishihara (Nagoya Univ.) VLD2019-113 HWS2019-86 |
In VLSI design, a designer needs the integrated circuit to keep correct operation under area, power,
and performance co... [more] |
VLD2019-113 HWS2019-86 pp.113-118 |
HWS, VLD [detail] |
2020-03-06 17:15 |
Okinawa |
Okinawa Ken Seinen Kaikan (Cancelled but technical report was issued) |
Circuit Architecture Exploration for Optical Neural Network based on Integrated Nanophotonics Naoki Hattori, Yutaka Masuda, Tohru Ishihara (Nagoya Univ.), Jun Shiomi (Kyoto Univ.), Akihiko Shinya, Masaya Notomi (NTT) VLD2019-137 HWS2019-110 |
With a rapid progress of the integrated nanophotonics technology, optical neural networks
based on the integrated nano... [more] |
VLD2019-137 HWS2019-110 pp.251-256 |
VLD, HWS (Joint) |
2018-03-02 10:55 |
Okinawa |
Okinawa Seinen Kaikan |
Experimental study on power reduction by approximate computing with voltage over-scaling Masahiro Sato, Yutaka Masuda, Masanori Hashimoto (Osaka Univ.) VLD2017-123 |
(To be available after the conference date) [more] |
VLD2017-123 pp.205-210 |
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