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Committee Date Time Place Paper Title / Authors Abstract Paper #
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]		 2012-11-27
09:00		 Fukuoka Centennial Hall Kyushu University School of Medicine [Invited Talk] High-Speed Interconnect Technologies
Yutaka Uematsu, Go Shinkai, Satoshi Muraoka, Masayoshi Yagyu, Hideki Osaka (Hitachi) CPM2012-112 ICD2012-76		  [more] CPM2012-112 ICD2012-76
pp.1-6
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]		 2012-11-28
11:20		 Fukuoka Centennial Hall Kyushu University School of Medicine High Sensitive Detection of Low S/N ratio Signal by Bistable Potential Circuit
Hisaaki Kanai, Wen Li, Kengo Imagawa, Masami Makuuchi, Yutaka Uematsu, Hideki Osaka (Hitachi, Ltd.) VLD2012-93 DC2012-59		 Stochastic resonance (SR), a phenomenon that signals can be enhanced with especial noise strength in a non-linear system... [more] VLD2012-93 DC2012-59
pp.195-200
EMCJ 2009-11-20
13:55		 Tokyo Aoyama Gakuin Univ. (Aoyama Campus) Measurement Techniques for On-chip Power Supply Noise Waveforms based on Delay Observation in Inverter Chain Circuits
Yutaka Uematsu, Hideki Osaka, Eiichi Suzuki, Masayoshi Yagyu, Tatsuya Saito (Hitachi Co Ltd.) EMCJ2009-83		 To evaluate an on-chip power supply noise waveforms for power integrity design, we have developed a
technique for measu... [more]		 EMCJ2009-83
pp.25-30
EMCJ 2009-11-20
14:20		 Tokyo Aoyama Gakuin Univ. (Aoyama Campus) PDN Analysis of LSI Package in Short TAT using TMM and Approximated Equivalent Circuit
Masahiro Toyama, Yutaka Uematsu, Hideki Osaka (Hitachi,LTD.), Motoo Suwa, Atsushi Nakamura (Renesas Tech Corp.) EMCJ2009-84		 For the efficient optimizing of LSI package PDN (Power Distribution Network) in early stage of the design, short TAT ana... [more] EMCJ2009-84
pp.31-36
CPM, ICD 2008-01-18
10:30		 Tokyo Kikai-Shinko-Kaikan Bldg A Method for Measuring Vref Noise Tolerance of DDR2-SDRAM on Test Board that Simulates Memory Module
Yutaka Uematsu, Hideki Osaka (Hitachi), Yoji Nishio, Susumu Hatano (Elpida) CPM2007-139 ICD2007-150		 Aiming to achieve double data rate-synchronous DRAM (DDR-SDRAM) at low-cost and with high noise tolerance by setting ade... [more] CPM2007-139 ICD2007-150
pp.65-69
 Results 1 - 5 of 5  /   
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