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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| ET | 2023-03-14 11:45 |
Tokushima | Tokushima University (Primary: On-site, Secondary: Online) |
Learning Support System to Understand Others Through Reading Dramatic Scripts and Its Initial Evaluation Hanano Okamoto (Osaka Prefecture Univ.), Yuki Hayashi, Kazuhisa Seta (Osaka Metropolitan Univ.)  ET2022-68 |
In order to form and maintain smooth interpersonal relationships in various situations in social life, the ability to ap... [more] | ET2022-68 pp.49-56 |
| IPSJ-SLDM, RECONF, VLD [detail] | 2023-01-24 10:30 |
Kanagawa | Raiosha, Hiyoshi Campus, Keio University (Primary: On-site, Secondary: Online) |
Measurement results of soft error tolerance of LPDDR4 SDRAM and GDDR5 SDRAM Motoki Kamibayashi, Kazutoshi Kobayashi (Kyoto Inst. of Tech.), Masanori Hashimoto (Kyoto Univ.) VLD2022-65 RECONF2022-88 |
In recent years, as the memory capacity of computer systems has increased,the reliability of the system has decreased.So... [more] | VLD2022-65 RECONF2022-88 pp.34-39 |
| SDM | 2022-11-10 15:15 |
Online | Online | [Invited Talk]
Simulation of CMOS circuit and single-electron transistors for readout of spin qubits Tetsufumi Tanamoto (Teikyo Univ.) SDM2022-68 |
In this study, we consider a scalable detection circuit theoretically based on the implementation of pairs of single-ele... [more] | SDM2022-68 pp.19-22 |
| SDM | 2021-02-05 16:40 |
Online | Online | [Invited Talk]
Bumpless Build Cube (BBCube) using Wafer-on-Wafer (WOW) Technology with 3D Redundancy Scheme Shinji Sugatani, Norio Chujo, Koji Sakui, Hiroyuki Ryoson, Tomoji Nakamura, Takayuki Ohba (Titech) SDM2020-61 |
An application of vertically replaceable memory block architecture scheme hereinafter referred to as “3D redundancy” fo... [more] |
SDM2020-61 pp.27-32 |
| MVE | 2020-09-08 10:25 |
Online | Online | A basic analysis of ''Previously on...'' on drama series Ryosuke Yamanishi (Kansai Univ.), Yoko Nishihara (Ritsumeikan Univ.) MVE2020-10 |
This paper describes a basic analysis of the dynamic summary of the drama series focusing on the subtitles. The dynamic ... [more] | MVE2020-10 pp.7-12 |
| ICSS, IPSJ-SPT | 2020-03-03 15:40 |
Okinawa | Okinawa-Ken-Seinen-Kaikan (Cancelled but technical report was issued) |
Effective single-sided RAMBleed Hiroki Nagahama (Kobe Univ), Makoto Takita (Univ of Hyogo), Masanori Hirotomo (Saga Univ), Masakatsu Morii (Kobe Univ) ICSS2019-91 |
There is a phenomenon called Rowhammer in which bit flip occurs in the neighboring row by repeatedly accessing the row o... [more] | ICSS2019-91 pp.145-150 |
| IPSJ-SLDM, RECONF, VLD, CPSY, IPSJ-ARC [detail] | 2020-01-22 11:50 |
Kanagawa | Raiosha, Hiyoshi Campus, Keio University | DDR4 SDRAM controller for real-time processing So Haramura, Nobuyuki Yamasaki (Keio Univ.) VLD2019-56 CPSY2019-54 RECONF2019-46 |
Recently, larger scale programs are frequently used in embedded systems, and a higher capacity of main memory is require... [more] | VLD2019-56 CPSY2019-54 RECONF2019-46 pp.13-17 |
| PN | 2019-11-15 11:05 |
Kanagawa | [Invited Talk]
Emerging Studies in Computer Memory Systems Takahiro Hirofuchi (AIST) PN2019-28 |
This paper presents emerging studies in computer memory systems. The advent of new non-volatile memory devices, such as ... [more] | PN2019-28 pp.29-35 |
|
| MW, ED | 2019-01-17 16:25 |
Tokyo | Hitachi, Central Research Lab. | [Invited Talk]
Silicon Semiconductor, "past, present, and future" Shin'ichiro Kimura (Hitachi) ED2018-80 MW2018-147 |
(To be available after the conference date) [more] | ED2018-80 MW2018-147 pp.63-66 |
| VLD, HWS (Joint) |
2018-03-02 09:50 |
Okinawa | Okinawa Seinen Kaikan | Approximate computing based on extension of DRAM refresh interval and data correction Takamasa Fukasawa, Kimiyoshi Usami (SIT) VLD2017-121 |
As DRAM capacity increases, there is concern that energy consumption will increase due to the refresh. Therefore, we pro... [more] | VLD2017-121 pp.193-198 |
| IPSJ-ARC, VLD, CPSY, RECONF, IPSJ-SLDM [detail] | 2018-01-18 11:05 |
Kanagawa | Raiosha, Hiyoshi Campus, Keio University | Naoya Niwa, Tomohiro Totoki, Hiroki Matsutani (Keio Univ.), Michihiro Koibuchi (NII), Hideharu Amano (Keio Univ.) VLD2017-66 CPSY2017-110 RECONF2017-54 |
(To be available after the conference date) [more] | VLD2017-66 CPSY2017-110 RECONF2017-54 pp.25-29 |
| SDM | 2016-06-29 11:55 |
Tokyo | Campus Innovation Center Tokyo | Effect of Al2O3layer on leakage current properties for DRAM capacitor with ZrO2/Al2O3/ZrO2multilayer Takashi Onaya (Meiji Univ./NIMS), Toshihide Nabatame, Tomomi Sawada (NIMS/JST-CREST), Kazunori Kurishima (Meiji Univ./NIMS), Naomi Sawamoto (Meiji Univ.), Akihiko Ohi, Toyohiro Chikyo (NIMS), Atsushi Ogura (Meiji Univ.) SDM2016-37 |
We studied characteristic of DRAM capacitors with ZrO2/Al2O3/ZrO2 (ZAZ) multilayer fabricated by atomic layer deposition... [more] | SDM2016-37 pp.27-32 |
| RECONF | 2016-05-20 10:25 |
Kanagawa | FUJITSU LAB. | A Dynamic Memory Selection Strategy for Key-Value Store Appliances with DRAMs and SSDs Hiroaki Komatsu, Hiroki Matsutani (Keio Univ.) RECONF2016-19 |
(To be available after the conference date) [more] | RECONF2016-19 pp.91-96 |
| SDM | 2016-01-22 14:35 |
Tokyo | Sanjo Conference Hall, The University of Tokyo | [Invited Talk]
Effect of Wafer Thinning on DRAM Characteristics for Bumpless Interconnects and WOW Applications Y. S. Kim, S. Kodama, Y. Mizushima, T. Nakamura, N. Maeda, K. Fujimoto (Tokodai), A. Kawai (DISCO), T. Ohba (Tokodai) SDM2015-116 |
(To be available after the conference date) [more] | SDM2015-116 pp.33-37 |
| RECONF | 2015-06-20 09:55 |
Kyoto | Kyoto University | A Near-memory Processing Architecture on FPGAs for Data Movement Intensive Applications Vu Hoang Gia, Tran Thi Hong, Shinya Takamaeda, Yasuhiko Nakashima (NAIST) RECONF2015-15 |
Memory latency is the most serious design concern in computing centric architectures integrated with cache levels as a d... [more] | RECONF2015-15 pp.79-84 |
| ICD, SDM | 2014-08-04 11:15 |
Hokkaido | Hokkaido Univ., Multimedia Education Bldg. | Testability Improvement for 12.8 GB/s Wide IO DRAM Controller with Small Area Prebonding TSV test and 1GHz Sampled Fully Digital Noise Monitor Takao Nomura, Ryo Mori, Koji Takayanagi, Toshihiko Ochiai, Kazuki Fukuoka, Tsuyoshi Kida, Koji Nii, Sadayuki Morita (REL) SDM2014-65 ICD2014-34 |
We developed a Wide IO DRAM controller chip with Through Silicon Via (TSV) technology. Test circuitry is embedded in the... [more] | SDM2014-65 ICD2014-34 pp.17-21 |
| ICSS, ISEC, SITE, EMM, IPSJ-CSEC, IPSJ-SPT [detail] | 2014-07-03 15:20 |
Hokkaido | San-Refure Hakodate | Privacy Invasion and the Concept of the "Digital Person"
-- Understanding Based on Information Ethics and Goffman's Dramaturgy Theory -- Takushi Otani (Kibi International Univ.) ISEC2014-28 SITE2014-23 ICSS2014-32 EMM2014-28 |
This article explores the harm caused by the misuses of the “digital person,” which is the aggregated personal data from... [more] | ISEC2014-28 SITE2014-23 ICSS2014-32 EMM2014-28 pp.205-212 |
| ICD | 2014-04-17 15:50 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Panel Discussion]
Perspective of emerging memories in systems and systems on emerging memories Toru Miwa (SanDisk), Koji Nii (Renesas), Shinobu Fujita (Toshiba), Hiroki Koike (Tohoku Univ.), Ken Takeuchi (Chuo Univ.) ICD2014-9 |
(To be available after the conference date) [more] | ICD2014-9 p.45 |
| ICD | 2013-04-11 17:30 |
Ibaraki | Advanced Industrial Science and Technology (AIST) | [Panel Discussion]
Future prospects of memory solutions for smart society
-- Can new nonvolatile memories replace SRAM/DRAM/Flash? -- Koji Nii (Renesas Erctronics), Tetsuo Endoh (Tohoku Univ.), Yoshikazu Katoh (Panasonic), Satoru Hanzawa (Hitachi), Kazuhiko Kajigaya (Elpida Memory), Atsushi Kawasumi (Toshiba), Toru Miwa (SanDisk) ICD2013-11 |
(To be available after the conference date) [more] | ICD2013-11 p.53 |
| SDM | 2012-03-05 10:50 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Basic Performance of a Logic-IP Compatible eDRAM with Cylinder Capacitors in Low-k/Cu BEOL Layers Ippei Kume, Naoya Inoue, Ken'ichiro Hijioka, Jun Kawahara, Koichi Takeda, Naoya Furutake, Hiroki Shirai, Kenya Kazama, Shin'ichi Kuwabara, Msasatoshi Watarai, Takashi Sakoh, Toshifumi Takahashi, Takashi Ogura, Toshiji Taiji, Yoshiko Kasama (Renesas Electronics) SDM2011-177 |
We have confirmed the basic performance of a Logic-IP compatible (LIC) eDRAM with cylinder capacitors in the low-k/Cu BE... [more] | SDM2011-177 pp.7-11 |
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