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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 20 of 42  /  [Next]  
Committee Date Time Place Paper Title / Authors Abstract Paper #
IBISML 2021-03-04
09:05
Online Online IBISML2020-52 Experimental design (also known as the Design of experiments) is a systematic methodology for designing experiments to c... [more] IBISML2020-52
p.71
ICTSSL, CAS 2020-01-30
13:10
Tokyo   [Invited Talk] A Proposal of MOS LSI Analog Sign-Off Verification.
Kimihiro Ogawa (Success Inc.) CAS2019-70 ICTSSL2019-39
In analog MOS circuit sign-off verification to guarantee design yield, it is well known that analog oriented methodology... [more] CAS2019-70 ICTSSL2019-39
pp.35-41
MVE 2019-08-30
09:50
Aichi   A thought of idea-method using "Fuben_eki" for planning measures by cooperations.
Yasuo Nosaka (HAKUHODO), Hiroshi Kawakami (Kyoto Univ.), Masamitsu Momose (HAKUHODO), Takashi Akiyama (UP), Makiko Okita (Tamagawa Univ.) MVE2019-16
We review the methodology for applying the " Fuben-eki" (i.e., the viewpoint of aiming for a system design that provides... [more] MVE2019-16
pp.61-66
MVE 2019-08-30
10:30
Aichi   [Invited Talk] Research and Development of New Technologies from the Viewpoint of Service Design
Sumaru Niida (KDDI Research) MVE2019-17
Innovation is strongly required in rapidly changing economic environment. As a process to achieve the innovation, method... [more] MVE2019-17
pp.67-70
ICD, MW 2018-03-01
14:25
Shiga The University of Shiga Prefecture [Special Talk] Method of prototyping small BRF using V slot DGS by a PCB prototyping machine
Ryusei Nakamura, Satoshi Ono, Koji Wada (UEC) MW2017-181 ICD2017-105
In this study, Band-rejection filter (BRF) is realized by using DGS (Defected Ground Structure) which realizes inductanc... [more] MW2017-181 ICD2017-105
pp.39-44
RECONF 2016-09-06
10:55
Toyama Univ. of Toyama A Study of Methodology and Tools for Open-source FPGA Accelerators
Takuya Nakamichi, Qian Zhao, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.) RECONF2016-34
Today's information and communication society requires more and higher-performance computing devices with the constraint... [more] RECONF2016-34
pp.45-50
KBSE 2016-03-03
10:40
Oita   A Web Design Method using Multi Dimensional Scaling and the Distance between Contents based on Persona Analysis
Masahiro Kasatani, Masashi Shibamoto, Akio Ida, Shigeo Kaneda (Doshisha Univ) KBSE2015-50
In the process of Web-site creation, the designer has to group Web-contents into some categories, and design the links b... [more] KBSE2015-50
pp.13-18
ICD, CPSY 2015-12-18
10:00
Kyoto Kyoto Institute of Technology [Invited Talk] A Story of a Startup Semiconductor Company, From Creation to Evacuation -- What to learn in your university life --
Kazuo Taki (Kobe Univ.) ICD2015-85 CPSY2015-98
This article shows 10-year experiences on a startup semiconductor design company, originally started from university res... [more] ICD2015-85 CPSY2015-98
pp.81-82
AI 2015-02-23
15:00
Kyoto Kyoto Univ. Web Application for Overseas Social Business Matching -- Based on the case of international exchange in Myanmar --
Aoi Hayakawa, Yoshihiro Yamashita, Noriko Ueta, Chihiro Nakada, Chigusa Kita (Kansai Univ.), Hideo Sawada (TUFS) AI2014-37
This is an interim report on the development of social business application software. Throughout the design process, we... [more] AI2014-37
pp.13-15
R 2014-12-19
14:35
Tokyo   A consideration of the network reliability model for disaster risk reduction
Hitoshi Watanabe, Pingguo Huang (Tokyo Univ. of Science) R2014-68
The possibility of the method to determine the reliability requirement of telecommunication network in disaster conditio... [more] R2014-68
pp.19-24
EMCJ, IEE-EMC 2014-12-19
16:40
Shizuoka Shizuoka Univ. [Special Talk] SI/PI/EMI Simulation Techniques and Their Exploitation for Chip/Package/Board/Chassis Co-design -- Multi-domain Simulation --
Hideki Asai (Shizuoka Univ.) EMCJ2014-83
With the progress of system integration technology, so-called signal/power integrity (SI/PI) and EMI
(Electromagnetic I... [more]
EMCJ2014-83
p.81
RECONF 2014-09-19
10:10
Hiroshima   Building a Mixed Software Hardware Pipeline on CPU-FPGA Platforms
Takaaki Miyajima (Keio Univ.), David Thomas (ICL), Hideharu Amano (Keio Univ.) RECONF2014-27
This new toolchain for accelerating application on CPU-FPGA platforms, called Courier-FPGA, extracts runtime information... [more] RECONF2014-27
pp.57-62
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2013-11-28
08:55
Kagoshima   System-level design method considering the interrupt processing
Yuki Ando, Yukihito Ishida, Shinya Honda, Hiroaki Takada, Masato Edahiro (Nagoya Univ.) VLD2013-77 DC2013-43
We propose a system level design methodology for control systems that have both input and output by abstraction of inter... [more] VLD2013-77 DC2013-43
pp.119-124
EMD 2013-01-25
13:35
Kanagawa Hitachi, Ltd., (Totsuka, Yokohama) [Invited Talk] The latest trend of PCB pattern design technique for LSI stable operation, suppressing noise and high speed serial interface
Akihiro Tanaka, Hiroyuki Motoki, Hideyuki Nakanishi (Aica Kogyo) EMD2012-97
A design method for power distribution network of printed circuit board (PCB) adopting the parameters of input impedance... [more] EMD2012-97
p.1
ICD, ITE-IST 2012-07-27
11:15
Yamagata Yamagata University Loop Design Optimization for Fourth-Order Fractional-N PLL Frequency Synthesizers
Shoichi Masui (Fujitsu Labs), Lee Jun-Gyu (Tohoku Univ.) ICD2012-27
We propose a methodology of loop design optimization for fourth-order fractional-N PLL frequency synthesizers featuring ... [more] ICD2012-27
pp.59-64
ICD 2011-12-16
11:20
Osaka   Hardware software co-design methodology tolerating software redundancy
Yuta Teranishi (Fujitsu Qnet), Toshiya Otomo, Koji Kurihara, Hiromasa Yamauchi, Takahisa Suzuki, Koichiro Yamashita (Fujitsu Lab) ICD2011-130
In high-performance SoC design, the best system cannot be done even if the optimized software and the optimized hardware... [more] ICD2011-130
pp.137-142
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2011-11-29
13:00
Miyazaki NewWelCity Miyazaki Layout Methodology for Self-Alinged Double Patterning
Chikaaki Kodama, Koichi Nakayama, Toshiya Kotani, Shigeki Nojima, Shoji Mimotogi, Shinji Miyamoto (Toshiba) VLD2011-76 DC2011-52
We propose a new layout method for the damascene process of
self-aligned double patterning (SADP).
In this method, w... [more]
VLD2011-76 DC2011-52
pp.141-146
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2011-11-29
17:00
Miyazaki NewWelCity Miyazaki [Keynote Address] Lithography : past, present, and future
Shigeki Nojima (Toshiba) VLD2011-81 CPM2011-161 ICD2011-93 CPSY2011-48 DC2011-57 RECONF2011-49
Lithography is one of the key technologies for semiconductor device shrink. For example, wave length
becomes shorter an... [more]
VLD2011-81 CPM2011-161 ICD2011-93 CPSY2011-48 DC2011-57 RECONF2011-49
p.171(VLD), p.65(CPM), p.65(ICD), p.33(CPSY), p.171(DC), p.45(RECONF)
KBSE 2011-11-11
09:40
Nagano Shinshu Univ. Research Issues on Systems Development Document Quality
Shuichiro Yamamoto (Nagoya Univ.), Taro Kurita (Felica Networks), Yoshikazu Yamamoto (Denso Create Inc) KBSE2011-45
The quality of document is important to develop successfully systems. Many researches were proposed to evaluate the qual... [more] KBSE2011-45
pp.55-60
ICD, IPSJ-ARC 2011-01-20
14:20
Kanagawa Keio University (Hiyoshi Campus) [Invited Talk] CMOS Hyper-Miniaturization and Cooperation with 3D System Design Integration
Kazuya Okamoto, Ryohei Satoh (Osaka Univ.)
Miniaturization technology based on Dennard’s rule for CMOS devices has been progressing technically over time and has c... [more] ICD2010-131
p.29
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