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Committee Date Time Place Paper Title / Authors Abstract Paper #
HWS, ICD 2022-10-25
(Primary: On-site, Secondary: Online)
Hardware Acceleration of TFHE-based Adder by Controlling Error
Yinfan Zhao, Ikeda Makoto (Univ. of Tokyo) HWS2022-40 ICD2022-32
Fully homomorphic encryption (FHE) is expected to be used in the secure delegating computation. The bootstrapping in the... [more] HWS2022-40 ICD2022-32
RECONF 2022-06-07
Ibaraki CCS, Univ. of Tsukuba
(Primary: On-site, Secondary: Online)
Vector Register Sharing Mechanism for Hardware Acceleration
Tomoaki Tanaka, Ryousuke Higashi (TUAT), Kiyofumi Tanaka (JAIST), Yasunori Osana (Univ. of the Ryukyus), Takefumi Miyoshi (Wasalabo), Jubee Tada (Yamagata Univ.), Hironori Nakajo (TUAT) RECONF2022-5
In this paper, we present a vector register sharing mechanism that directly shares vector registers inside the processor... [more] RECONF2022-5
SR 2022-05-11
Tokyo NICT Koganei
(Primary: On-site, Secondary: Online)
[Invited Lecture] vRAN Acceleration by GPU -- NVIDIA Platform and Aerial SDK --
Hashimoto Noriyuki, Noda Makoto (NVIDIA) SR2022-3
Virtualized RAN (vRAN) and Open RAN are promising technologies for the 5G and beyond 5G systems, where vRAN is composed ... [more] SR2022-3
NS 2022-04-15
Tokyo kikai shinkou kaikan + online
(Primary: On-site, Secondary: Online)
Study of Multi-access VPN Systems with Hardware Accelerators
Katsuma Miyamoto, Hiroki Kano, Koji Sugisono, Shinya Kawano (NTT) NS2022-5
In recent years, the use of VPN services has increased rapidly due to the spread of telework, and the use of VPN service... [more] NS2022-5
RECONF, VLD, CPSY, IPSJ-ARC, IPSJ-SLDM [detail] 2022-01-25
Online Online Preliminary evaluation of cache coherent interconnect for Reconfigurable Virtual Accelerator (ReVA)
Eriko Maeda, Daichi Teruya, Hironori Nakajo (TUAT) VLD2021-72 CPSY2021-41 RECONF2021-80
In recent years, the amount of computation and data in HPC, AI, and other computational processing has become increasing... [more] VLD2021-72 CPSY2021-41 RECONF2021-80
Okinawa Okinawa Industry Support Center Hardware Accelerator for Coordinated Radio-Resource Scheduling in 5G Ultra-high-density Distributed Antenna Systems
Yuki Arikawa, Takeshi Sakamoto, Shunji Kimura, Satoshi Shigematsu (NTT) RCS2018-208
This paper presents a novel radio-resource scheduler with a hardware accelerator for coordinated scheduling in 5G ultra-... [more] RCS2018-208
HWS, ICD 2018-10-29
Osaka Kobe Univ. Umeda Intelligent Laboratory An Acceleration of Compressed Squaring for Pairing Implementation with Pipeline Modular Multiplier
Yota Okuaki, Junichi Sakamoto, Naoki Yoshida, Daisuke Fujimoto, Tsutomu Matsumoto (YNU) HWS2018-50 ICD2018-42
One of the biggest problems of the emerging cyber-physical and cloud computing systems is how to ensure security with en... [more] HWS2018-50 ICD2018-42
CS 2017-07-27
Nagasaki Fukue Bunka Kaikan [Invited Talk] A Study on Application of Hardware Accelerator for Radio-resource Scheduler in 5G Mobile Systems
Yuki Arikawa, Takeshi Sakamoto, Shunji Kimura (NTT) CS2017-24
For the fifth generation mobile communication systems (5G), in order to increase overall system throughput, ultra-high-d... [more] CS2017-24
RCS 2017-06-21
Okinawa Ishigaki Shoukou Kaikan Hardware Accelerator for Radio-Resource Scheduling in Ultra-high Dense Distributed Antenna Systems
Yuki Arikawa, Takeshi Sakamoto, Shunji Kimura (NTT) RCS2017-58
For the fifth generation mobile communication systems (5G), in order to increase overall system throughput, ultra-high-d... [more] RCS2017-58
Fukuoka Kyushu Sangyo University Hardware Acceleration Technique for Optimization of Radio-resource Allocation in 5G Mobile Systems
Yuki Arikawa, Hiroyuki Uzawa, Takeshi Sakamoto, Shunji Kimura (NTT) CS2016-68
For the fifth generation mobile communication systems (5G), in order to increase overall system throughput, ultra-high-d... [more] CS2016-68
RECONF 2016-05-19
Kanagawa FUJITSU LAB. Design of an FPGA-based Accelerator for Moleculer Dynamics Using OpenCL
Hasitha Muthumala Waidyasooriya, Masanori Hariyama (Tohoku Univ.), Kota Kasahara (Osaka Univ.) RECONF2016-4
Molecular dynamics (MD) simulations are very important to study physical properties of atoms and molecules. However, a h... [more] RECONF2016-4
Tokyo Tokyo Institute of Technology Basic Study on Coordinated Radio-resource Scheduler Architecture in Ultra-high-density Distributed Antenna Systems
Yuki Arikawa, Hiroyuki Uzawa, Satoshi Shigematsu (NTT) RCS2015-375
For fifth generation mobile communication systems (5G), in order to increase overall system throughput, ultra-high-densi... [more] RCS2015-375
CPSY 2014-11-13
Hiroshima Hiroshima University Consideration for Acceleration of Feature Transformation based on the Bag-of-Features for Colorectal Endoscopic Images
Koki Sugi, Tetsushi Koide, Anh-Tuan Hoang, Takumi Okamoto, Tatsuya Shimizu, Toru Tamaki, Bisser Raytchev, Kazufumi Kaneda, Yoko Kominami, Shigeto Yoshida, Shinji Tanaka (Hiroshima Univ.) CPSY2014-55
With the increase of colorectal cancer patients in recent years, the computer-aided diagnosis (CAD) system which support... [more] CPSY2014-55
ASN 2014-05-29
Tokyo Convention Hall, RCAST, The University of Tokyo [Poster Presentation] Research on Structural Health Monitoring System of Buildings using Open Source Hardware -- Comparison of Measurement Performance on Open Source Hardware --
Akinori Tani, Yuichiro Yamabe, Qi Liang (Kobe Univ.) ASN2014-11
Recently, various kinds of open source hardware (OSHW) are developed, and many sensors are also available to use various... [more] ASN2014-11
Fukuoka Kitakyushu-Kokusai-Kaigijyo An Access Request Dispatch Method on Scalable Storage Systems
Masanori Takada, Norio Shimozono, Kazuhisa Fujimoto, Yuki Sakashita, Akira Fujibayashi, Mutsumi Hosoya (Hitachi) CPSY2013-14
On a scalable storage system architecture, which host interface modules and processor modules are decoupled, the request... [more] CPSY2013-14
IN 2013-06-20
Fukui University of Fukui, Bunkyo Campus, Memorial Academy Hall Writing Window Join Processor in C
Eric Shun Fukuda (Hokkaido Univ.), Hideyuki Kawashima (Univ. of Tsukuba), Hiroaki Inoue (NEC), Tetsuya Asai, Masato Motomura (Hokkaido Univ.) IN2013-26
In the past, there has always been a wide gap between the skills for designing software and hardware. Now that reconfigu... [more] IN2013-26
RECONF, VLD, CPSY, IPSJ-SLDM [detail] 2011-01-18
Kanagawa Keio Univ (Hiyoshi Campus) A Gateway and Remote Call Mechanisms for a PC-FPGA Hybrid Cluster
Masaki Kohata, Akira Uejima, Ryo Ozaki (Okayama Univ. of Sci.) VLD2010-114 CPSY2010-69 RECONF2010-83
Parallel processing by PC cluster and hardware acceleration by FPGA are useful technologies in a field of high performan... [more] VLD2010-114 CPSY2010-69 RECONF2010-83
RECONF 2010-05-14
Nagasaki   Software-Hardware Communication and Remote Call on a PC-FPGA Hybrid Cluster
Masaki Kohata, Akira Uejima, Ryo Ozaki (Okayama Univ. of Sci.) RECONF2010-12
Parallel processing with PC cluster and hardware acceleration with FPGA are useful technologies in a field of high perfo... [more] RECONF2010-12
CPSY 2007-10-26
Kumamoto Kumamoto University An examination of hardware acceleration in FPGA placement based on SA
Yoshio Sonokawa, Yuji Ariuchi, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.) CPSY2007-30
Placement is one of the steps that expend the time in the FPGA (Field Programmable Gate Array) design automation flow.
... [more]
PRMU, MI 2007-05-25
Mie Mie Univ. GPU-Accelerated Volume Reconstruction for Cone-Bean CT
Seiji Yoshida, Fumihiko Ino, Kenichi Hagihara (Osaka Univ.) PRMU2007-20 MI2007-20
Volume reconstruction for cone-beam CT (computed tomography)
is a process which reconstructs 3-D (three dimensional) v... [more]
PRMU2007-20 MI2007-20
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