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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| AP, WPT (Joint) |
2023-01-19 12:05 |
Hiroshima | Hiroshima Institute of Technology (Primary: On-site, Secondary: Online) |
5G radio wave propagation analysis in a city model by large-scale FDTD simulation using the supercomputer "Fugaku" Yoichi Kochibe, Naoki Ebata, Takashi Yamagajo, Wataru Odajima, Hiroaki Watanabe, Hikaru Inoue (Fujitsu)  AP2022-182 |
Recently, the utilization of the radio communication technology such as the service start of the fifth-generation mobile... [more] | AP2022-182 pp.30-32 |
| HWS, VLD [detail] | 2020-03-05 16:00 |
Okinawa | Okinawa Ken Seinen Kaikan (Cancelled but technical report was issued) |
Approximate Floating Point Multiplier based on Shifting Addition Using Carry Signal from Second-Highest-Bit Jie Li, Yi Guo, Shinji Kimura (Waseda Univ.) VLD2019-120 HWS2019-93 |
Approximate computing (AC) sacrifices accuracy for better hardware performance since it relaxes the requirement of exact... [more] | VLD2019-120 HWS2019-93 pp.151-156 |
| RECONF | 2019-09-20 10:40 |
Fukuoka | KITAKYUSHU Convention Center | Multi-threaded High-Level Synthesis for Bandwidth-intensive Applications Jens Huthmann, Auter Podobas, Takaaki Miyajima, Atsushi Koshiba, Kentaro Sano (RIKEN) RECONF2019-30 |
Using stream computing on Field-Programmable Gate Arrays (FPGAs) has in the recent decades shown promise for practical ... [more] | RECONF2019-30 pp.51-56 |
| SSS | 2019-03-26 13:20 |
Tokyo | High Reliability and Safety Protection Method for Applying Artificial Intelligence to Embedded Systems Yasuhiro Omori, Akihiko Higuchi, Daisuke Kawakami (Mitsubishi Electric Co.) SSS2018-32 |
This paper proposes an architecture for embedded systems, which employs machine learning results. The proposed architect... [more] | SSS2018-32 pp.3-6 |
|
| IN, NS (Joint) |
2019-03-05 09:00 |
Okinawa | Okinawa Convention Center | A report on large-scale data transfer experiments on SINET-5 Ken T. Murata, Pavarangkoon Praphan, Kazunori Yamamoto (NICT), Kazuya Muranaga (SEC), Takamichi Mizuhara (CLT), Keiichiro Fukazawa (Kyoto Univ.), Ryusuke Egawa (Tohoku Univ.), Takahiro Katagiri, Masao Ogino (Nagoya Univ.), Takeshi Nanri (Kyushu Univ.) IN2018-113 |
We develop a high-speed data transfer protocol for inter-datacenter transport network, namely high-performance and flexi... [more] | IN2018-113 pp.175-179 |
| CPSY, DC, IPSJ-ARC (Joint) [detail] |
2018-08-01 16:15 |
Kumamoto | Kumamoto City International Center | Adaptation of Ray, a distributed framework for machine learning, to MPI-based environment Tianlun Wang (Univ. of Tsukuba), Yusuke Tanimura, Hidemoto Nakada (AIST) CPSY2018-28 |
Ray is a distributed framework for machine learning that targets reinforcement learning using multiple nodes. While it w... [more] | CPSY2018-28 pp.205-210 |
| PRMU, SP | 2018-06-29 13:00 |
Nagano | [Invited Talk]
Koichi Shinoda (TokyoTech) PRMU2018-33 SP2018-13 |
(To be available after the conference date) [more] | PRMU2018-33 SP2018-13 p.65 |
|
| CPSY, DC, IPSJ-ARC [detail] | 2018-06-14 13:40 |
Yamagata | Takamiya Rurikura Resort | Optimized Pfaffian Computation Yudai Konno, Yoshihide Yoshimoto (UT) CPSY2018-1 DC2018-1 |
The Pfaffian is a homogeneous polynomial defined for a skew-symmetric matrix. The Pfaffian has similar characteristics ... [more] |
CPSY2018-1 DC2018-1 pp.19-23 |
| CS, IE, IPSJ-AVM, ITE-BCT [detail] | 2017-12-01 09:30 |
Aichi | Nagoya University | [Invited Talk]
High-Performance Computing Programming for Image Processing Based on Computer Architecture Norishige Fukushima (NIT) CS2017-72 IE2017-87 |
In this report, we review a parallelized and vectorized programming for high performance image processing and its design... [more] | CS2017-72 IE2017-87 pp.73-78 |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2017-11-08 09:00 |
Kumamoto | Kumamoto-Kenminkouryukan Parea | CPSY2017-44 |
The number of computing nodes increases for both on-chip multi-core systems and supercomputers. Therefore, the network l... [more] | CPSY2017-44 pp.23-28 |
| VLD | 2017-03-01 15:55 |
Okinawa | Okinawa Seinen Kaikan | A Design Technique for Approximate Circuits based on Artificial Neural Network Kazushi Kawamura, Masao Yanagisawa, Nozomu Togawa (Waseda Univ.) VLD2016-106 |
This paper proposes a design technique for approximate circuits based on artificial neural network, and then evaluates t... [more] | VLD2016-106 pp.25-30 |
| NS | 2017-01-26 14:50 |
Kagoshima | Kagoshima J-Kaikan | [Invited Lecture]
Simple Java Implementation of High Availability Distributed Server Cluster Platform Software Kiyoshi Ueda, Katsunari Nagase, Shota Furuya, Tomohiro Ono, Ain Kakuno (Nihon Univ.) NS2016-145 |
Recently, for the early creation of the network service and large reduction of development and operative cost, Network F... [more] | NS2016-145 pp.23-28 |
| CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2016-03-25 09:55 |
Nagasaki | Fukue Bunka Hall/Rodou Fukushi Center | An Effective Virtual Channel Allocation Method for Deterministic Deadlock-free Routing Ryuta Kawano, Hiroshi Nakahara (Keio Univ.), Ikki Fujiwara (NII), Hiroki Matsutani, Hideharu Amano (Keio Univ.), Michihiro Koibuchi (NII) CPSY2015-148 DC2015-102 |
Distributed routing methods with small routing tables are scalable design on irregular networks for large-scale High Per... [more] | CPSY2015-148 DC2015-102 pp.163-168 |
| VLD, CPSY, RECONF, IPSJ-SLDM, IPSJ-ARC [detail] | 2016-01-20 14:15 |
Kanagawa | Hiyoshi Campus, Keio University | Design of Stencil Computation based on Building-Cube Method on an FPGA Accelerator with High Level Synthesis Rie Soejima, Koji Okina, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ.) VLD2015-91 CPSY2015-123 RECONF2015-73 |
In building-cube method (BCM), which is one of the adaptive mesh refinement, the computational region is divided into a ... [more] | VLD2015-91 CPSY2015-123 RECONF2015-73 pp.125-130 |
| ICD, CPSY | 2015-12-18 14:30 |
Kyoto | Kyoto Institute of Technology | A Low Latency Distributed Routing Method for Random Topologies in HPC Networks Ryuta Kawano, Hiroshi Nakahara (Keio Univ.), Ikki Fujiwara (NII), Hiroki Matsutani, Hideharu Amano (Keio Univ.), Michihiro Koibuchi (NII) ICD2015-90 CPSY2015-103 |
End-to-end network latency has become an important issue for parallel application on large-scale High Performance Comput... [more] | ICD2015-90 CPSY2015-103 pp.105-110 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2015-12-03 11:15 |
Nagasaki | Nagasaki Kinro Fukushi Kaikan | Logic Design of A Single-Flux-Quantum Microprocessor Koki Ishida, Tomonori Tsuhata (Kyushu Univ.), Masamitsu Tanaka (Nagoya Univ.), Takatsugu Ono, Koji Inoue (Kyushu Univ.) CPSY2015-73 |
CMOS microprocessors have been facing a limitation for clock speed improvement because of increasing computing power. U... [more] |
CPSY2015-73 pp.69-74 |
| EMT, IEE-EMT | 2015-06-12 13:25 |
Tokyo | meeting room (1-5) of IEEJ | Design Study of FDTD/FIT Dataflow Machine for Wider Applications Hideki Kawaguchi (Muroran IT) EMT2015-5 |
For a purpose of practical use of microwave simulation technologies in industry applications, this paper presents a meth... [more] | EMT2015-5 pp.25-30 |
| ICD | 2015-04-16 16:40 |
Nagano | [Panel Discussion]
Advanced semiconductor memories in cloud computing and high-performance computing Koji Nii (Renesas Electronics), Kousuke Miyaji (Shinshu Univ.), Ryousei Takano (AIST), Kensei Takagi, Toru Miwa (SanDisk) ICD2015-7 |
(To be available after the conference date) [more] | ICD2015-7 p.31 |
|
| CPSY, DC (Joint) |
2014-07-29 10:45 |
Niigata | Toki Messe, Niigata | Interconnect Design for Low Latency, High Topological Embeddability and Partitioning Capability by Supplementary Optical Circuit Switches Ryuta Kawano (Keio Univ.), Ikki Fujiwara (NII), Hiroki Matsutani, Hideharu Amano (Keio Univ.), Michihiro Koibuchi (NII) CPSY2014-20 |
This paper focuses on how to efficiently run multiple small parallel applications in a single High-performance computing... [more] | CPSY2014-20 pp.61-66 |
| CPSY, IPSJ-EMB, IPSJ-SLDM, DC [detail] | 2014-03-16 10:50 |
Okinawa | HPC interconnect for high topological embeddability by supplementary optical circuit switches Ryuta Kawano (Keio Univ.), Ikki Fujiwara (NII), Hiroki Matsutani, Hideharu Amano (Keio Univ.), Michihiro Koibuchi (NII) CPSY2013-111 DC2013-98 |
Our goal is to run multiple parallel applications that have various communication patterns among participating processes... [more] | CPSY2013-111 DC2013-98 pp.253-258 |
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