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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
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Committee Date Time Place Paper Title / Authors Abstract Paper #
MSS, CAS, SIP, VLD 2023-07-06
Hokkaido   Performance Improvement by Memory access and Process-level Pipelining for High-level Synthesized Sprite Drawing Hardware
Yuka Otani, Akira Yamawaki (Kyutech)
(To be available after the conference date) [more]
RECONF 2023-06-08
Kochi Eikokuji Campus, Kochi University of Technology
(Primary: On-site, Secondary: Online)
Parallelization of Prim's Algorithm Using FPGA and Its Performance Evaluation
Noritsune O, Kenji Kanazawa, Moritoshi Yasunaga (Univ. of Tsukuba)
(To be available after the conference date) [more]
HWS, VLD 2023-03-02
(Primary: On-site, Secondary: Online)
Automatic Synthesis of Decoupled Data Orchestration in High-Level Synthesis
Masayuki Usui, Shinya Takamaeda (UTokyo) VLD2022-90 HWS2022-61
We automatically decouple data orchestration mechanisms in explicit data orchestration to facilitate accelerator design.... [more] VLD2022-90 HWS2022-61
CAS, CS 2023-03-01
Fukuoka Kitakyushu International Conference Center
(Primary: On-site, Secondary: Online)
Memory access optimization for former process of pencil drawing style image conversion in High-level Synthesis
Honoka Tani, Akira Yamawaki (Kyutech) CAS2022-105 CS2022-82
To effectively use high-level synthesis, which automatically converts software to hardware, it is necessary to create so... [more] CAS2022-105 CS2022-82
RECONF 2022-06-07
Ibaraki CCS, Univ. of Tsukuba
(Primary: On-site, Secondary: Online)
Hardware implementation of the protocol for ROS2 and robot modules without CPU
Daiki Matsunaga, Tomoya Shoji, Shozo Takeoka (AXE) RECONF2022-3
ROS2 is a set of software libraries and tools for robot applications. It is widely used in robot development. A ROS2 rob... [more] RECONF2022-3
VLD, HWS [detail] 2022-03-07
Online Online A Heuristic Scheduling Algorithm with Variable-Cycle Approximate Operations in High-Level Synthesis
Koyu Ohata, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama (Ritsumeikan Univ.) VLD2021-78 HWS2021-55
This paper studies a scheduling algorithm for high-level synthesis that takes into account the difference in delay betwe... [more] VLD2021-78 HWS2021-55
IE, ITS, ITE-AIT, ITE-ME, ITE-MMS [detail] 2022-02-22
Online Online Development of a Real Camera System with High-Level Synthesis Hardware of Median-Based Dynamic Background Subtraction
Kohei Shinyamada, Akira Yamawaki (Kyutech) ITS2021-61 IE2021-70
In this study, we developed a median-based dynamic background subtraction image processing system equipped with a real c... [more] ITS2021-61 IE2021-70
RECONF, VLD, CPSY, IPSJ-ARC, IPSJ-SLDM [detail] 2022-01-24
Online Online Full Hardware Implementation of RTOS-Based Systems Using General-Purpose High-Level Synthesizer
Takuya Ando, Yugo Ishii, Nagisa Ishiura (Kwansei Gakuin Univ.), Hiroyuki Tomiyama (Ritsumeikan Univ.), Hiroyuki Kanbara (ASTEM RI/KYOTO) VLD2021-51 CPSY2021-20 RECONF2021-59
This article proposes a method for implementing a whole RTOS-based system as hardware using general-purpose high-level s... [more] VLD2021-51 CPSY2021-20 RECONF2021-59
RECONF, VLD, CPSY, IPSJ-ARC, IPSJ-SLDM [detail] 2022-01-24
Online Online Design of Inter-Task Communication Modules for Full Hardware Implementation of RTOS-Based Systems
Yukino Shinohara, Nagisa Ishiura (Kwansei Gakuin Univ.) VLD2021-52 CPSY2021-21 RECONF2021-60
This paper presents hardware implementation of inter-task communication functions of RTOS, in the scheme where all the t... [more] VLD2021-52 CPSY2021-21 RECONF2021-60
HWS, VLD [detail] 2021-03-03
Online Online Aggregating Service Functions in Full Hardware Implementation of RTOS-Based Systems
Iori Muguruma, Nagisa Ishiura, Takuya Ando (Kwansei Gakuin Univ.), Hiroyuki Tomiyama (Ritsumeikan Univ.), Hiroyuki Kanbara (ASTEM RI/KYOTO) VLD2020-75 HWS2020-50
This article presents a revised architecture for full-hardware
implementation of RTOS-based systems. In the previous m... [more]
VLD2020-75 HWS2020-50
HWS, VLD [detail] 2021-03-04
Online Online High-level synthesis of approximate circuits with two-level accuracies
Kenta Shirane, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama (Ritumeikan Univ.) VLD2020-80 HWS2020-55
This paper studies high-level synthesis (HLS) of approximate computing circuits with multiple accuracy levels. This work... [more] VLD2020-80 HWS2020-55
HWS, VLD [detail] 2021-03-04
Online Online FPGA Implementation of Lightweight Cipher Chaskey through High-Level Synthesis and its Evaluation of Side-Channel Attack Resistance
Saya Inagaki, Mingyu Yang (Tokyo Tech), Yang Li, Kazuo Sakiyama (UEC), Yuko Hara (Tokyo Tech) VLD2020-86 HWS2020-61
(To be available after the conference date) [more] VLD2020-86 HWS2020-61
CPSY, RECONF, VLD, IPSJ-ARC, IPSJ-SLDM [detail] 2021-01-26
Online Online Automated architecture exploration on Scala-based hardware development environment
Ryota Yamashita, Daichi Teruya, Hironori Nakajo (TUAT) VLD2020-62 CPSY2020-45 RECONF2020-81
In recent years, reconfigurable architectures such as FPGAs have been attracting more and more attention.
Design Space... [more]
VLD2020-62 CPSY2020-45 RECONF2020-81
CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] 2020-02-27
Kagoshima Yoron-cho Chuou-Kouminkan HLS by multi-objective optimization under resource constraints -- Approach to extracting coarse-grained parallelism using functional language --
Fukuhei Hamazaki, Tetsuro Yamazaki, Ryota Shioya (U-Tokyo), Kenichi Koizumi, Hiroshi Tezuka, Mary Inaba (U-Tokyo) CPSY2019-104 DC2019-110
For engineers who are not familiar with circuits, it is difficult to optimize circuit considering trade-off factors such... [more] CPSY2019-104 DC2019-110
ICTSSL, CAS 2020-01-30
Tokyo   High-level synthesis oriented histogram series duplication for overlapping continuous image processing
Moena Yamasaki, Akira Yamawaki (Kyutech) CAS2019-80 ICTSSL2019-49
In order to quickly realize a high-performance and power-saving embedded image processing device, it is effective to use... [more] CAS2019-80 ICTSSL2019-49
IPSJ-SLDM, RECONF, VLD, CPSY, IPSJ-ARC [detail] 2020-01-23
Kanagawa Raiosha, Hiyoshi Campus, Keio University Binary Synthesis from RISC-V Executables
Shoki Hamana, Nagisa Ishiura (Kwansei Gakuin Univ.) VLD2019-71 CPSY2019-69 RECONF2019-61
This article presents a method of synthesizing hardware from RISC-V binary codes. RISC-V is an open source instruction s... [more] VLD2019-71 CPSY2019-69 RECONF2019-61
RECONF 2019-09-20
Fukuoka KITAKYUSHU Convention Center Multi-threaded High-Level Synthesis for Bandwidth-intensive Applications
Jens Huthmann, Auter Podobas, Takaaki Miyajima, Atsushi Koshiba, Kentaro Sano (RIKEN) RECONF2019-30
Using stream computing on Field-Programmable Gate Arrays (FPGAs) has in the recent decades shown promise for practical ... [more] RECONF2019-30
ISEC, SITE, ICSS, EMM, HWS, BioX, IPSJ-CSEC, IPSJ-SPT [detail] 2019-07-24
Kochi Kochi University of Technology Design Space Search Applying Bayesian Optimization to High-level Design Flow
Ryohei Nakayama (UTokyo), Hiromitsu Awano (Osaka Univ.), Makoto Ikeda (UTokyo) ISEC2019-57 SITE2019-51 BioX2019-49 HWS2019-52 ICSS2019-55 EMM2019-60
Now that circuit scale is increasing, high-level synthesis technology that designs circuits using high-level programming... [more] ISEC2019-57 SITE2019-51 BioX2019-49 HWS2019-52 ICSS2019-55 EMM2019-60
HWS, VLD 2019-03-01
Okinawa Okinawa Ken Seinen Kaikan Synthesis of Full Hardware Implementation of RTOS-Based Systems
Yuuki Oosako, Nagisa Ishiura (Kwansei Gakuin Univ.), Hiroyuki Tomiyama (Ritsumeikan Univ.), Hiroyuki Kanbara (ASTEM) VLD2018-122 HWS2018-85
This paper presents a method of automatically synthesizing a hardware
design from a set of source codes for a real-time... [more]
VLD2018-122 HWS2018-85
HWS, VLD 2019-03-01
Okinawa Okinawa Ken Seinen Kaikan Synthesis of Distributed Control Circuits for Dynamic Scheduling across Multiple Dataflow Graphs
Sayuri Ota, Nagisa Ishiura (Kwansei Gakuin Univ.) VLD2018-125 HWS2018-88
This article presents a method for synthesizing circuits with distributed control from CDFGs (control data flow graphs).... [more] VLD2018-125 HWS2018-88
 Results 1 - 20 of 123  /  [Next]  
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