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All Technical Committee Conferences (Searched in: Recent 10 Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| ICSS | 2024-11-21 14:00 |
Kanagawa | MUZA Kawasaki Symphony Hall | How to Utilize The LLVM Compiler Infrastructure for Self Destructive Tamper Resistant Software Kazuomi Oishi (SIST)  ICSS2024-66 |
Self destructive tamper resistant software can protect program from analysis and attacks. After the concept was proposed... [more] | ICSS2024-66 pp.1-7 |
| HCL (3rd) |
2024-11-21 13:00 |
Yamanashi | Mount Fuji Research Institute Hall | [Poster Presentation]
A Performance Study on Rust and C Programs and Discussion of Methods to Reduce Performance Degradation. Shunsuke Okawa, Saneyasu Yamaguchi (Kogakuin Univ.) |
Rust is a newly proposed programming language. The language is increasing its importance with its sophisticated features... [more] | |
| CPSY, DC, RECONF, IPSJ-ARC [detail] | 2024-08-08 16:20 |
Tokushima | Awagin Hall (Primary: On-site, Secondary: Online) |
Performance evaluation for directive-based parallelization code at the LLVM IR level Takumi Yanagida, Kanemitsu Ootsu, Takashi Yokota (Utsunomiya Univ.) CPSY2024-24 DC2024-24 RECONF2024-24 |
Parallelization work is necessary to accelerate existing application programs using multi-core processors, but this work... [more] | CPSY2024-24 DC2024-24 RECONF2024-24 pp.40-45 |
| KBSE | 2024-01-24 15:40 |
Kagoshima | (Primary: On-site, Secondary: Online) |
Improvement of learning method using intermediate representation in machine learning method for code smell detection Risa Hirahara, Tomoji Kishi (Waseda Univ.) KBSE2023-64 |
In recent years，methods for detecting code smells have mainly been researched using machine learning．However，the disadva... [more] | KBSE2023-64 pp.79-84 |
| VLD, DC, RECONF, ICD, IPSJ-SLDM [detail] | 2023-11-16 14:10 |
Kumamoto | Civic Auditorium Sears Home Yume Hall (Primary: On-site, Secondary: Online) |
Hardware obfuscation method using Obfuscator-LLVM and Bambu Mikiya Ogura, Shuichi Ichikawa (Toyohashi Univ. Tech.) VLD2023-54 ICD2023-62 DC2023-61 RECONF2023-57 |
Hardware obfuscation serves as a countermeasure against hardware reverse engineering. Yamada et al. employed the OLLVM s... [more] | VLD2023-54 ICD2023-62 DC2023-61 RECONF2023-57 pp.125-130 |
| IA, ICSS | 2021-06-21 13:55 |
Online | Online | An initial evaluation between C language and PRSafe for developing eBPF programs Mahadevan Sai Veerya, Takano Yuuki, Miyaji Atsuko (Handai) IA2021-3 ICSS2021-3 |
The eBPF ( Berkeley Packet Filter) in the Linux OS is a virtual machine for running user-space programs written in C lan... [more] | IA2021-3 ICSS2021-3 pp.14-19 |
| CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] | 2020-02-28 10:35 |
Kagoshima | Yoron-cho Chuou-Kouminkan | Construction and Evaluation of Software Development Environment for CGRA using LLVM Ayaka Ohwada, Takuya Kojima, Hideharu Amano (Keio Univ.) CPSY2019-109 DC2019-115 |
(To be available after the conference date) [more] | CPSY2019-109 DC2019-115 pp.145-150 |
| HWS, VLD | 2019-02-27 12:40 |
Okinawa | Okinawa Ken Seinen Kaikan | Pattern Matching Based Detection of Wire Congestion from Source Code Description for High Level Synthesis Masato Tatsuoka, Mineo Kaneko (JAIST) VLD2018-96 HWS2018-59 |
When we use a high level synthesis (HLS) tool, the optimization of input code is necessary for obtaining an optimized ... [more] | VLD2018-96 HWS2018-59 pp.19-24 |
| CPSY, DC, IPSJ-ARC [detail] | 2018-06-15 13:10 |
Yamagata | Takamiya Rurikura Resort | Implementation of Code Generation for Parallel Processing Based on Parallelization Directives in LLVM IR Code Kengo Jingu, Kanemitsu Ootsu, Takeshi Ohkawa, Takashi Yokota (Utsunomiya Univ.) CPSY2018-6 DC2018-6 |
Nowadays, multi-core processors are widely used, and the speedup can be accomplished by thread-level parallel processing... [more] | CPSY2018-6 DC2018-6 pp.107-112 |
| VLD, HWS (Joint) |
2018-02-28 14:20 |
Okinawa | Okinawa Seinen Kaikan | Development of Loop Flattening Tool that Reduces Cycle Overhead in Loop Pipelining of Nested Loops in High Level Synthesis Daisuke Ishikawa, Kenshu Seto (TCU) VLD2017-97 |
We develop a loop flattening tool for designing hardware with high level synthesis. When loop pipelining is applied to ... [more] | VLD2017-97 pp.49-54 |
| IPSJ-ARC, VLD, CPSY, RECONF, IPSJ-SLDM [detail] | 2018-01-19 16:40 |
Kanagawa | Raiosha, Hiyoshi Campus, Keio University | Mutant Generation of Performance Tests for LLVM Back-Ends Kenji Tanaka, Nagisa Ishiura (Kwansei Gakuin Univ.), Masanari Nishimura, Akiya Fukui (Renesas) VLD2017-88 CPSY2017-132 RECONF2017-76 |
This article presents a method of testing optimization capability of LLVM back-ends by generating functionally equivalen... [more] | VLD2017-88 CPSY2017-132 RECONF2017-76 pp.169-174 |
| CPSY, DC, IPSJ-ARC (Joint) [detail] |
2017-07-28 17:30 |
Akita | Akita Atorion-Building (Akita) | Consideration on ARM Machine Code Frontend for LLVM-based Binary Code Optimization Kohta Shigenobu, Kanemitsu Ootsu, Takeshi Ohkawa, Takashi Yokota (Utsunomiya Univ.) CPSY2017-39 |
Recently, mobile devices and embedded devices equipped with processing devices such as multicore processor and GPU are b... [more] | CPSY2017-39 pp.229-234 |
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