IEICE Technical Committee Submission System
Conference Schedule
Online Proceedings
[Sign in]
Tech. Rep. Archives
    [Japanese] / [English] 
( Committee/Place/Topics  ) --Press->
 
( Paper Keywords:  /  Column:Title Auth. Affi. Abst. Keyword ) --Press->

All Technical Committee Conferences  (Searched in: All Years)

Search Results: Conference Papers
 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 10 of 10  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
KBSE 2024-01-24
15:40
Kagoshima
(Primary: On-site, Secondary: Online)
Improvement of learning method using intermediate representation in machine learning method for code smell detection
Risa Hirahara, Tomoji Kishi (Waseda Univ.) KBSE2023-64
In recent years,methods for detecting code smells have mainly been researched using machine learning.However,the disadva... [more] KBSE2023-64
pp.79-84
VLD, DC, RECONF, ICD, IPSJ-SLDM [detail] 2023-11-16
14:10
Kumamoto Civic Auditorium Sears Home Yume Hall
(Primary: On-site, Secondary: Online)
Hardware obfuscation method using Obfuscator-LLVM and Bambu
Mikiya Ogura, Shuichi Ichikawa (Toyohashi Univ. Tech.) VLD2023-54 ICD2023-62 DC2023-61 RECONF2023-57
Hardware obfuscation serves as a countermeasure against hardware reverse engineering. Yamada et al. employed the OLLVM s... [more] VLD2023-54 ICD2023-62 DC2023-61 RECONF2023-57
pp.125-130
IA, ICSS 2021-06-21
13:55
Online Online An initial evaluation between C language and PRSafe for developing eBPF programs
Mahadevan Sai Veerya, Takano Yuuki, Miyaji Atsuko (Handai) IA2021-3 ICSS2021-3
The eBPF ( Berkeley Packet Filter) in the Linux OS is a virtual machine for running user-space programs written in C lan... [more] IA2021-3 ICSS2021-3
pp.14-19
CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] 2020-02-28
10:35
Kagoshima Yoron-cho Chuou-Kouminkan Construction and Evaluation of Software Development Environment for CGRA using LLVM
Ayaka Ohwada, Takuya Kojima, Hideharu Amano (Keio Univ.) CPSY2019-109 DC2019-115
(To be available after the conference date) [more] CPSY2019-109 DC2019-115
pp.145-150
HWS, VLD 2019-02-27
12:40
Okinawa Okinawa Ken Seinen Kaikan Pattern Matching Based Detection of Wire Congestion from Source Code Description for High Level Synthesis
Masato Tatsuoka, Mineo Kaneko (JAIST) VLD2018-96 HWS2018-59
When we use a high level synthesis (HLS) tool, the optimization of input code is necessary for obtaining an optimized ... [more] VLD2018-96 HWS2018-59
pp.19-24
CPSY, DC, IPSJ-ARC [detail] 2018-06-15
13:10
Yamagata Takamiya Rurikura Resort Implementation of Code Generation for Parallel Processing Based on Parallelization Directives in LLVM IR Code
Kengo Jingu, Kanemitsu Ootsu, Takeshi Ohkawa, Takashi Yokota (Utsunomiya Univ.) CPSY2018-6 DC2018-6
Nowadays, multi-core processors are widely used, and the speedup can be accomplished by thread-level parallel processing... [more] CPSY2018-6 DC2018-6
pp.107-112
VLD, HWS
(Joint)
2018-02-28
14:20
Okinawa Okinawa Seinen Kaikan Development of Loop Flattening Tool that Reduces Cycle Overhead in Loop Pipelining of Nested Loops in High Level Synthesis
Daisuke Ishikawa, Kenshu Seto (TCU) VLD2017-97
We develop a loop flattening tool for designing hardware with high level synthesis. When loop pipelining is applied to ... [more] VLD2017-97
pp.49-54
IPSJ-ARC, VLD, CPSY, RECONF, IPSJ-SLDM [detail] 2018-01-19
16:40
Kanagawa Raiosha, Hiyoshi Campus, Keio University Mutant Generation of Performance Tests for LLVM Back-Ends
Kenji Tanaka, Nagisa Ishiura (Kwansei Gakuin Univ.), Masanari Nishimura, Akiya Fukui (Renesas) VLD2017-88 CPSY2017-132 RECONF2017-76
This article presents a method of testing optimization capability of LLVM back-ends by generating functionally equivalen... [more] VLD2017-88 CPSY2017-132 RECONF2017-76
pp.169-174
CPSY, DC, IPSJ-ARC
(Joint) [detail]
2017-07-28
17:30
Akita Akita Atorion-Building (Akita) Consideration on ARM Machine Code Frontend for LLVM-based Binary Code Optimization
Kohta Shigenobu, Kanemitsu Ootsu, Takeshi Ohkawa, Takashi Yokota (Utsunomiya Univ.) CPSY2017-39
Recently, mobile devices and embedded devices equipped with processing devices such as multicore processor and GPU are b... [more] CPSY2017-39
pp.229-234
KBSE 2014-05-29
17:15
Kanagawa Keio Univ.(Raiou-sha, Hiyoshi Campus) Design and implementation of Ruby front-end for GPGPU
Tomoyuki Nakatsuka, Hirohide Haga (Doshisha Univ.) KBSE2014-6
This paper describes the design and implement of Ruby library named ``rbcuda''
for GPGPU based on CUDA programming envi... [more]
KBSE2014-6
pp.31-36
 Results 1 - 10 of 10  /   
Choose a download format for default settings. [NEW !!]
Text format pLaTeX format CSV format BibTeX format
Copyright and reproduction : All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)


[Return to Top Page]

[Return to IEICE Web Page]


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan